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Analysis and Design of Resilient VLSI Circuits - Mitigating Soft Errors and Process Variations (Hardcover, 2010 ed.): Rajesh... Analysis and Design of Resilient VLSI Circuits - Mitigating Soft Errors and Process Variations (Hardcover, 2010 ed.)
Rajesh Garg
R4,479 Discovery Miles 44 790 Ships in 10 - 15 working days

This monograph is motivated by the challenges faced in designing reliable VLSI systems in modern VLSI processes. The reliable operation of integrated circuits (ICs) has become increasingly dif?cult to achieve in the deep submicron (DSM) era. With continuouslydecreasing device feature sizes, combinedwith lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations, and radiation-inducedsoft errors. Among these noise sources, soft errors(or error caused by radiation particle strikes) have become an increasingly troublesome issue for memory arrays as well as c- binational logic circuits. Also, in the DSM era, process variations are increasing at a signi?cant rate, making it more dif?cult to design reliable VLSI circuits. Hence, it is important to ef?ciently design robust VLSI circuits that are resilient to radiation particle strikes and process variations. The work presented in this research mo- graph presents several analysis and design techniques with the goal of realizing VLSI circuits, which are radiation and process variation tolerant.

Minimizing and Exploiting Leakage in VLSI Design (Hardcover, 2010 ed.): Nikhil Jayakumar, Suganth Paul, Rajesh Garg Minimizing and Exploiting Leakage in VLSI Design (Hardcover, 2010 ed.)
Nikhil Jayakumar, Suganth Paul, Rajesh Garg
R4,485 Discovery Miles 44 850 Ships in 10 - 15 working days

Power consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. Traditionally, dynamic (switching) power has dominated the total power consumption of an IC. However, due to current scaling trends, leakage power has now become a major component of the total power consumption in VLSI circuits. Leakage power reduction is especially important in portable/hand-held electronics such as cell-phones and PDAs. This book presents two techniques aimed at reducing leakage power in digital VLSI ICs. The first technique reduces leakage through the selective use of high threshold voltage sleep transistors. The second technique reduces leakage by applying the optimal Reverse Body Bias (RBB) voltage. This book also shows readers how to turn the leakage problem into an opportunity, through the use of sub-threshold logic.

Analysis and Design of Resilient VLSI Circuits - Mitigating Soft Errors and Process Variations (Paperback, 2010 ed.): Rajesh... Analysis and Design of Resilient VLSI Circuits - Mitigating Soft Errors and Process Variations (Paperback, 2010 ed.)
Rajesh Garg
R3,119 Discovery Miles 31 190 Ships in 10 - 15 working days

This monograph is motivated by the challenges faced in designing reliable VLSI systems in modern VLSI processes. The reliable operation of integrated circuits (ICs) has become increasingly dif?cult to achieve in the deep submicron (DSM) era. With continuouslydecreasing device feature sizes, combinedwith lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations, and radiation-inducedsoft errors. Among these noise sources, soft errors(or error caused by radiation particle strikes) have become an increasingly troublesome issue for memory arrays as well as c- binational logic circuits. Also, in the DSM era, process variations are increasing at a signi?cant rate, making it more dif?cult to design reliable VLSI circuits. Hence, it is important to ef?ciently design robust VLSI circuits that are resilient to radiation particle strikes and process variations. The work presented in this research mo- graph presents several analysis and design techniques with the goal of realizing VLSI circuits, which are radiation and process variation tolerant.

Minimizing and Exploiting Leakage in VLSI Design (Paperback, 2010 ed.): Nikhil Jayakumar, Suganth Paul, Rajesh Garg Minimizing and Exploiting Leakage in VLSI Design (Paperback, 2010 ed.)
Nikhil Jayakumar, Suganth Paul, Rajesh Garg
R3,119 Discovery Miles 31 190 Ships in 10 - 15 working days

Power consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. Traditionally, dynamic (switching) power has dominated the total power consumption of an IC. However, due to current scaling trends, leakage power has now become a major component of the total power consumption in VLSI circuits. Leakage power reduction is especially important in portable/hand-held electronics such as cell-phones and PDAs. This book presents two techniques aimed at reducing leakage power in digital VLSI ICs. The first technique reduces leakage through the selective use of high threshold voltage sleep transistors. The second technique reduces leakage by applying the optimal Reverse Body Bias (RBB) voltage. This book also shows readers how to turn the leakage problem into an opportunity, through the use of sub-threshold logic.

Employees Are Diamonds - The Value of Investing in Your Human Capital: Rajesh Garg Employees Are Diamonds - The Value of Investing in Your Human Capital
Rajesh Garg
R164 Discovery Miles 1 640 Ships in 10 - 15 working days
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