The book Handheld Total Chemical and Biological Analysis Systems: Bridging NMR, Digital Microfluidics, and Semiconductors centers on the complete design of Nuclear Magnetic Resonance (NMR) microsystems for in vitro chemical and biological assays based on semiconductor chips and portable magnet. Different sensing mechanisms for CMOS in vitro assay are compared, key design criteria of the CMOS transceiver for NMR measurement are revealed, and system-level optimizations of the CMOS NMR platform utilizing digital microfluidic and diverse functions of the CMOS technology are discussed. Two CMOS NMR platforms are implemented, each of these focuses on different aspect of optimization.

This book provides readers with a state-of-the-art description of techniques to be used for ultra-low-power (ULP) and ultra-low-cost (ULC), short-range wireless receivers. Readers will learn what is required to deploy these receivers in short-range wireless sensor networks, which are proliferating widely to serve the internet of things (IoT) for "smart cities." The authors address key challenges involved with the technology and the typical tradeoffs between ULP and ULC. Three design examples with advanced circuit techniques are described in order to address these trade-offs, which special focus on cost minimization. These three techniques enable respectively, cascading of radio frequency (RF) and baseband (BB) circuits under an ultra-low-voltage (ULV) supply, cascading of RF and BB circuits in current domain for current reuse and a novel function-reuse receiver architecture, suitable for ULV and multi-band ULP applications such as the sub-GHz ZigBee.

This book provides readers with a state-of-the-art description of techniques to be used for ultra-low-power (ULP) and ultra-low-cost (ULC), short-range wireless receivers. Readers will learn what is required to deploy these receivers in short-range wireless sensor networks, which are proliferating widely to serve the internet of things (IoT) for "smart cities." The authors address key challenges involved with the technology and the typical tradeoffs between ULP and ULC. Three design examples with advanced circuit techniques are described in order to address these trade-offs, which special focus on cost minimization. These three techniques enable respectively, cascading of radio frequency (RF) and baseband (BB) circuits under an ultra-low-voltage (ULV) supply, cascading of RF and BB circuits in current domain for current reuse and a novel function-reuse receiver architecture, suitable for ULV and multi-band ULP applications such as the sub-GHz ZigBee.

This book presents high-/mixed-voltage analog and radio frequency (RF) circuit techniques for developing low-cost multistandard wireless receivers in nm-length CMOS processes. Key benefits of high-/mixed-voltage RF and analog CMOS circuits are explained, state-of-the-art examples are studied, and circuit solutions before and after voltage-conscious design are compared. Three real design examples are included, which demonstrate the feasibility of high-/mixed-voltage circuit techniques. Provides a valuable summary and real case studies of the state-of-the-art in high-/mixed-voltage circuits and systems; Includes novel high-/mixed-voltage analog and RF circuit techniques - from concept to practice; Describes the first high-voltage-enabled mobile-TVRF front-end in 90nm CMOS and the first mixed-voltage full-band mobile-TV Receiver in 65nm CMOS;Demonstrates the feasibility of high-/mixed-voltage circuit techniques with real design examples."

This book presents high-/mixed-voltage analog and radio frequency (RF) circuit techniques for developing low-cost multistandard wireless receivers in nm-length CMOS processes. Key benefits of high-/mixed-voltage RF and analog CMOS circuits are explained, state-of-the-art examples are studied, and circuit solutions before and after voltage-conscious design are compared. Three real design examples are included, which demonstrate the feasibility of high-/mixed-voltage circuit techniques. Provides a valuable summary and real case studies of the state-of-the-art in high-/mixed-voltage circuits and systems; Includes novel high-/mixed-voltage analog and RF circuit techniques - from concept to practice; Describes the first high-voltage-enabled mobile-TVRF front-end in 90nm CMOS and the first mixed-voltage full-band mobile-TV Receiver in 65nm CMOS;Demonstrates the feasibility of high-/mixed-voltage circuit techniques with real design examples."

This book presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. It provides an up-to-date survey and detailed study of the state-of-the-art transceivers for modern single- and multi-purpose wireless communication systems. The book includes comprehensive analysis and design of multimode reconfigurable receivers and transmitters for an efficient multistandard compliance.

Analog-to-Digital Converters (ADCs) play an important role in most modern signal processing and wireless communication systems where extensive signal manipulation is necessary to be performed by complicated digital signal processing (DSP) circuitry. This trend also creates the possibility of fabricating all functional blocks of a system in a single chip (System On Chip - SoC), with great reductions in cost, chip area and power consumption. However, this tendency places an increasing challenge, in terms of speed, resolution, power consumption, and noise performance, in the design of the front-end ADC which is usually the bottleneck of the whole system, especially under the unavoidable low supply-voltage imposed by technology scaling, as well as the requirement of battery operated portable devices. Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters will present new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specific considerations.

This volume reviews the fundamentals and studies the state-of-the-art multistandard transceivers before describing novel architectural and circuit techniques for implementing multimode and wideband (tens of MHz) baseband analog front-ends under low-voltage constraints. Techniques developed on architecture level for efficient system-in-package (SiP) integration, testability and multi-standardability; and on circuit level for reducing the required supply voltage, power and area, are generally applicable for most wireless systems, and are somewhat independent to technology scaling. Experimental 1-V baseband building blocks and a 1-V fully-integrated receiver analog-baseband chain for IEEE 802.11a/b/g WLAN validate the techniques. The implementations are all in standard-VTH CMOS process, and no voltage boosting is required at any node.