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An open process of restandardization, conducted by the IEEE, has
led to the definitions of the new VHDL standard. The changes make
VHDL safer, more portable, and more powerful. VHDL also becomes
bigger and more complete. The canonical simulator of VHDL is
enriched by new mechanisms, the predefined environment is more
complete, and the syntax is more regular and flexible.
Discrepancies and known bugs of VHDL'87 have been fixed. However,
the new VHDL'92 is compatible with VHDL'87, with some minor
exceptions. This book presents the new VHDL'92 for the VHDL
designer. New features ar explained and classified. Examples are
provided, each new feature is given a rationale and its impact on
design methodology, and performance is analysed. Where appropriate,
pitfalls and traps are explained. The VHDL designer will quickly be
able to find the feature needed to evaluate the benefits it brings,
to modify previous VHDL'87 code to make it more efficient, more
portable, and more flexible. VHDL'92 is the essential update for
all VHDL designers and managers involved in electronic design.
too vast, too complex, too grand ... for description. John Wesley
Powell-1870 (discovering the Grand Canyon) VHDL is a big world. A
beginner can be easily disappointed by the generality of this
language. This generality is explained by the large number of
domains covered - from specifications to logical simulation or
synthesis. To the very beginner, VHDL appears as a "kit". He is
quickly aware that his problem may be solved with VHDL, but does
not know how. He does not even know how to start. In this state of
mind, all the constraints that can be set to his modeling job, by
using a subset of the language or a given design methodology, may
be seen as a life preserver. The success of the introduction of
VHDL in a company depends on solutions to many questions that
should be answered months before the first line of code is written:
* Why choose VHDL? * Which VHDL tools should be chosen? * Which
modeling methodology should be adopted? * How should the VHDL
environment be customized? * What are the tricks? Where are the
traps? * What are the differences between VHDL and other competing
HDLs? Answers to these questions are organized according to
different concerns: buying the tools, organizing the environment,
and designing. Decisions taken in each of these areas may have many
consequences on the way to the acceptance and efficiently use of
VHDL in a company.
too vast, too complex, too grand ... for description. John Wesley
Powell-1870 (discovering the Grand Canyon) VHDL is a big world. A
beginner can be easily disappointed by the generality of this
language. This generality is explained by the large number of
domains covered - from specifications to logical simulation or
synthesis. To the very beginner, VHDL appears as a "kit". He is
quickly aware that his problem may be solved with VHDL, but does
not know how. He does not even know how to start. In this state of
mind, all the constraints that can be set to his modeling job, by
using a subset of the language or a given design methodology, may
be seen as a life preserver. The success of the introduction of
VHDL in a company depends on solutions to many questions that
should be answered months before the first line of code is written:
* Why choose VHDL? * Which VHDL tools should be chosen? * Which
modeling methodology should be adopted? * How should the VHDL
environment be customized? * What are the tricks? Where are the
traps? * What are the differences between VHDL and other competing
HDLs? Answers to these questions are organized according to
different concerns: buying the tools, organizing the environment,
and designing. Decisions taken in each of these areas may have many
consequences on the way to the acceptance and efficiently use of
VHDL in a company.
An open process of restandardization, conducted by the IEEE, has
led to the definitions of the new VHDL standard. The changes make
VHDL safer, more portable, and more powerful. VHDL also becomes
bigger and more complete. The canonical simulator of VHDL is
enriched by new mechanisms, the predefined environment is more
complete, and the syntax is more regular and flexible.
Discrepancies and known bugs of VHDL'87 have been fixed. However,
the new VHDL'92 is compatible with VHDL'87, with some minor
exceptions. This book presents the new VHDL'92 for the VHDL
designer. New features are explained and classified. Examples are
provided, each new feature is given a rationale and its impact on
design methodology, and performance is analyzed. Where appropriate,
pitfalls and traps are explained. The VHDL designer should quickly
be able to find the feature needed to evaluate the benefits it
brings, to modify previous VHDL'87 code to make it more efficient,
more portable, and more flexible. This text should be a useful
update for all VHDL designers and managers involved in electronic
design.
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