Asynchronous Circuit Design for VLSI Signal Processing is a collection of research papers on recent advances in the area of specification, design and analysis of asynchronous circuits and systems. This interest in designing digital computing systems without a global clock is prompted by the ever growing difficulty in adopting global synchronization as the only efficient means to system timing. Asynchronous circuits and systems have long held interest for circuit designers and researchers alike because of the inherent challenge involved in designing these circuits, as well as developing design techniques for them. The frontier research in this area can be traced back to Huffman's publications The Synthesis of Sequential Switching Circuits' in 1954 followed by Unger's book, Asynchronous Sequential Switching Circuits' in 1969 where a theoretical foundation for handling logic hazards was established. In the last few years a growing number of researchers have joined force in unveiling the mystery of designing correct asynchronous circuits, and better yet, have produced several alternatives in automatic synthesis and verification of such circuits. This collection of research papers represents a balanced view of current research efforts in the design, synthesis and verification of asynchronous systems.

Embedded systems are characterized by the presence of processors running application-specific software. Recent years have seen a large growth of such systems, and this trend is projected to continue with the growth of systems on a chip. Many of these systems have strict performance and cost requirements. To design these systems, sophisticated timing analysis tools are needed to accurately determine the extreme case (best case and worst case) performance of the software components. Existing techniques for this analysis have one or more of the following limitations: they cannot model complicated programs they cannot model advanced micro-architectural features of the processor, such as cache memories and pipelines they cannot be easily retargeted for new hardware platforms. In Performance Analysis of Real-Time Embedded Software, a new timing analysis technique is presented to overcome the above limitations. The technique determines the bounds on the extreme case (best case and worst case) execution time of a program when running on a given hardware system. It partitions the problem into two sub-problems: program path analysis and microarchitecture modeling. Performance Analysis of Real-Time Embedded Software will be of interest to Design Automation professionals as well as designers of circuits and systems.

Today 's embedded devices and sensor networks are becoming more and more sophisticated, requiring more efficient and highly flexible compilers. Engineers are discovering that many of the compilers in use today are ill-suited to meet the demands of more advanced computer architectures. Updated to include the latest techniques, The Compiler Design Handbook, Second Edition offers a unique opportunity for designers and researchers to update their knowledge, refine their skills, and prepare for emerging innovations. The completely revised handbook includes 14 new chapters addressing topics such as worst case execution time estimation, garbage collection, and energy aware compilation. The editors take special care to consider the growing proliferation of embedded devices, as well as the need for efficient techniques to debug faulty code. New contributors provide additional insight to chapters on register allocation, software pipelining, instruction scheduling, and type systems. Written by top researchers and designers from around the world, The Compiler Design Handbook, Second Edition gives designers the opportunity to incorporate and develop innovative techniques for optimization and code generation.

Embedded systems are characterized by the presence of processors running application-specific software. Recent years have seen a large growth of such systems, and this trend is projected to continue with the growth of systems on a chip. Many of these systems have strict performance and cost requirements. To design these systems, sophisticated timing analysis tools are needed to accurately determine the extreme case (best case and worst case) performance of the software components. Existing techniques for this analysis have one or more of the following limitations: * they cannot model complicated programs * they cannot model advanced micro-architectural features of the processor, such as cache memories and pipelines * they cannot be easily retargeted for new hardware platforms. In Performance Analysis of Real-Time Embedded Software, a new timing analysis technique is presented to overcome the above limitations. The technique determines the bounds on the extreme case (best case and worst case) execution time of a program when running on a given hardware system. It partitions the problem into two sub-problems: program path analysis and microarchitecture modeling.Performance Analysis of Real-Time Embedded Software will be of interest to Design Automation professionals as well as designers of circuits and systems.

Asynchronous Circuit Design for VLSI Signal Processing is a collection of research papers on recent advances in the area of specification, design and analysis of asynchronous circuits and systems. This interest in designing digital computing systems without a global clock is prompted by the ever growing difficulty in adopting global synchronization as the only efficient means to system timing. Asynchronous circuits and systems have long held interest for circuit designers and researchers alike because of the inherent challenge involved in designing these circuits, as well as developing design techniques for them. The frontier research in this area can be traced back to Huffman's publications `The Synthesis of Sequential Switching Circuits' in 1954 followed by Unger's book, `Asynchronous Sequential Switching Circuits' in 1969 where a theoretical foundation for handling logic hazards was established. In the last few years a growing number of researchers have joined force in unveiling the mystery of designing correct asynchronous circuits, and better yet, have produced several alternatives in automatic synthesis and verification of such circuits. This collection of research papers represents a balanced view of current research efforts in the design, synthesis and verification of asynchronous systems.