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Entropy Coders of the H.264/AVC Standard - Algorithms and VLSI Architectures (Hardcover, 2011 ed.): Xiaohua Tian, Thinh M. Le,... Entropy Coders of the H.264/AVC Standard - Algorithms and VLSI Architectures (Hardcover, 2011 ed.)
Xiaohua Tian, Thinh M. Le, Yong Lian
R4,555 R4,301 Discovery Miles 43 010 Save R254 (6%) Ships in 12 - 17 working days

This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from performance-complexity analyses to software/hardware co-simulation. A typical design of the Contextbased Adaptive Binary Arithmetic Coding (CABAC) encoder is also presented in details. To support System-on-Chip design environment, the CABAC design is wrapped with a SoC-based Wishbone system bus interface.

Entropy Coders of the H.264/AVC Standard - Algorithms and VLSI Architectures (Paperback, 2011 ed.): Xiaohua Tian, Thinh M. Le,... Entropy Coders of the H.264/AVC Standard - Algorithms and VLSI Architectures (Paperback, 2011 ed.)
Xiaohua Tian, Thinh M. Le, Yong Lian
R4,228 Discovery Miles 42 280 Ships in 10 - 15 working days

This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from performance-complexity analyses to software/hardware co-simulation. A typical design of the Contextbased Adaptive Binary Arithmetic Coding (CABAC) encoder is also presented in details. To support System-on-Chip design environment, the CABAC design is wrapped with a SoC-based Wishbone system bus interface.

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