|
Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design
|
Buy Now
Source-Synchronous Networks-On-Chip - Circuit and Architectural Interconnect Modeling (Paperback, Softcover reprint of the original 1st ed. 2014)
Loot Price: R3,028
Discovery Miles 30 280
|
|
|
Source-Synchronous Networks-On-Chip - Circuit and Architectural Interconnect Modeling (Paperback, Softcover reprint of the original 1st ed. 2014)
Expected to ship within 18 - 22 working days
|
This book describes novel methods for network-on-chip (NoC) design,
using source-synchronous high-speed resonant clocks. The authors
discuss NoCs from the bottom up, providing circuit level details,
before providing architectural simulations. As a result, readers
will get a complete picture of how a NoC can be designed and
optimized. Using the methods described in this book, readers are
enabled to design NoCs that are 5X better than existing approaches
in terms of latency and throughput and can also sustain a
significantly greater amount of traffic.
General
Is the information for this product incomplete, wrong or inappropriate?
Let us know about it.
Does this product have an incorrect or missing image?
Send us a new image.
Is this product missing categories?
Add more categories.
Review This Product
No reviews yet - be the first to create one!
|
|
Email address subscribed successfully.
A activation email has been sent to you.
Please click the link in that email to activate your subscription.
Welcome to Loot.co.za!
Sign in / Register |Wishlists & Gift Vouchers |Help | Advanced search
