Turbo Decoder Architecture for Beyond-4G Applications (Paperback, Softcover reprint of the original 1st ed. 2014)

This book describes the most recent techniques for turbo decoder implementation, especially for 4G and beyond 4G applications. The authors reveal techniques for the design of high-throughput decoders for future telecommunication systems, enabling designers to reduce hardware cost and shorten processing time. Coverage includes an explanation of VLSI implementation of the turbo decoder, from basic functional units to advanced parallel architecture. The authors discuss both hardware architecture techniques and experimental results, showing the variations in area/throughput/performance with respect to several techniques. This book also illustrates turbo decoders for 3GPP-LTE/LTE-A and IEEE 802.16e/m standards, which provide a low-complexity but high-flexibility circuit structure to support these standards in multiple parallel modes. Moreover, some solutions that can overcome the limitation upon the speedup of parallel architecture by modification to turbo codec are presented here. Compared to the traditional designs, these methods can lead to at most 33% gain in throughput with similar performance and similar cost.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Release date:	August 2016
First published:	2014
Authors:	Cheng-Chi Wong • Hsie-Chia Chang
Dimensions:	235 x 155 x 6mm (L x W x T)
Format:	Paperback
Pages:	100
Edition:	Softcover reprint of the original 1st ed. 2014
ISBN-13:	978-1-4939-4742-3
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Professional & Technical > Electronics & communications engineering > Communications engineering / telecommunications > General Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
LSN:	1-4939-4742-7
Barcode:	9781493947423

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