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Designing Digital Computer Systems with Verilog (Hardcover) Loot Price: R1,497
Discovery Miles 14 970
You Save: R267 (15%)
Designing Digital Computer Systems with Verilog (Hardcover): David J. Lilja, Sachin S Sapatnekar

Designing Digital Computer Systems with Verilog (Hardcover)

David J. Lilja, Sachin S Sapatnekar

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Was R1,764 Loot Price R1,497 Discovery Miles 14 970 | Repayment Terms: R140 pm x 12* You Save R267 (15%)

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This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined - this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.

General

Imprint: Cambridge UniversityPress
Country of origin: United Kingdom
Release date: December 2004
First published: 2005
Authors: David J. Lilja • Sachin S Sapatnekar
Dimensions: 255 x 174 x 14mm (L x W x T)
Format: Hardcover
Pages: 176
ISBN-13: 978-0-521-82866-6
Categories: Books > Computing & IT > General theory of computing > Systems analysis & design
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > General
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LSN: 0-521-82866-X
Barcode: 9780521828666

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