Adders are typically found in the critical paths of microprocessors
as well as digital signal processors. Although there are many
varieties of adders implemented within general-purpose and
application-specific processors, addition still remains a difficult
subject to understand. This occurs because there are limited
numbers of texts describing this operation. Design and Analysis of
High-Speed Addition presents analysis and design implementation
strategies for arithmetic datapath designs and methodologies
utilized in digital systems that employ high-speed addition. The
author covers addition schemes from the algorithmic to the actual
circuit design. Moreover, Very Large Scale Integration (VLSI)
design tools and methodologies are introduced to efficiently
analyze and design adder circuits.
This comprehensive treatment covers additions from the start of
making machines that compute addition to the latest designs in
current processors. Because Design and Analysis of High-Speed
Addition discusses advanced tools in VLSI design, it is an
excellent reference work for professionals and researchers
interested in processor design.
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