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Books > Computing & IT > General theory of computing > Data structures
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Asynchronous System-on-Chip Interconnect (Paperback, Softcover reprint of the original 1st ed. 2002)
Loot Price: R1,482
Discovery Miles 14 820
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Asynchronous System-on-Chip Interconnect (Paperback, Softcover reprint of the original 1st ed. 2002)
Series: Distinguished Dissertations
Expected to ship within 10 - 15 working days
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Asynchronous System-on-Chip Interconnect describes the use of an
entirely asynchronous system-bus for the modular construction of
integrated circuits. Industry is just awakening to the benefits of
asynchronous design in avoiding the problems of clock-skew and
multiple clock-domains, an din parallel with this is coming to
grips with Intellectual Property (IP) based design flows which
emphasise the need for a flexible interconnect strategy. In this
book, John Bainbridge investigates the design of an asynchronous
on-chip interconnect, looking at all the stages of the design from
the choice of wiring layout, through asynchronous signalling
protocols to the higher level problems involved in supporting split
transactions. The MARBLE bus (the first asynchronous SoC bus) used
in a commercial demonstrator chip containing a mixture of
asynchronous and synchronous macrocells is used as a concrete
example throughout the book.
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