Multi-Net Optimization of VLSI Interconnect (Hardcover, 2012)

This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Release date:	November 2014
First published:	2015
Authors:	Konstantin Moiseev • Avinoam Kolodny • Shmuel Wimer
Dimensions:	235 x 155 x 16mm (L x W x T)
Format:	Hardcover
Pages:	233
Edition:	2012
ISBN-13:	978-1-4614-0820-8
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
LSN:	1-4614-0820-2
Barcode:	9781461408208

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