|
Books > Computing & IT > General theory of computing
|
Buy Now
Quick-Turnaround ASIC Design in VHDL - Core-Based Behavioral Synthesis (Hardcover, 1996 ed.)
Loot Price: R4,462
Discovery Miles 44 620
|
|
|
Quick-Turnaround ASIC Design in VHDL - Core-Based Behavioral Synthesis (Hardcover, 1996 ed.)
Series: The Springer International Series in Engineering and Computer Science, 367
Expected to ship within 10 - 15 working days
|
From the Foreword..... Modern digital signal processing
applications provide a large challenge to the system designer.
Algorithms are becoming increasingly complex, and yet they must be
realized with tight performance constraints. Nevertheless, these
DSP algorithms are often built from many constituent canonical
subtasks (e.g., IIR and FIR filters, FFTs) that can be reused in
other subtasks. Design is then a problem of composing these core
entities into a cohesive whole to provide both the intended
functionality and the required performance. In order to organize
the design process, there have been two major approaches. The
top-down approach starts with an abstract, concise, functional
description which can be quickly generated. On the other hand, the
bottom-up approach starts from a detailed low-level design where
performance can be directly assessed, but where the requisite
design and interface detail take a long time to generate. In this
book, the authors show a way to effectively resolve this tension by
retaining the high-level conciseness of VHDL while parameterizing
it to get good fit to specific applications through reuse of core
library components. Since they build on a pre-designed set of core
elements, accurate area, speed and power estimates can be
percolated to high- level design routines which explore the design
space. Results are impressive, and the cost model provided will
prove to be very useful. Overall, the authors have provided an
up-to-date approach, doing a good job at getting performance out of
high-level design. The methodology provided makes good use of
extant design tools, and is realistic in terms of the industrial
design process. The approach is interesting in its own right, but
is also of direct utility, and it will give the existing DSP CAD
tools a highly competitive alternative. The techniques described
have been developed within ARPAs RASSP (Rapid Prototyping of
Application Specific Signal Processors) project, and should be of
great interest there, as well as to many industrial designers.
Professor Jonathan Allen, Massachusetts Institute of Technology
General
Is the information for this product incomplete, wrong or inappropriate?
Let us know about it.
Does this product have an incorrect or missing image?
Send us a new image.
Is this product missing categories?
Add more categories.
Review This Product
No reviews yet - be the first to create one!
|
You might also like..
|
Welcome to Loot.co.za!
Sign in / Register |Wishlists & Gift Vouchers |Help | Advanced search
(1)
