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Power-Constrained Testing of VLSI Circuits - A Guide to the IEEE 1149.4 Test Standard (Hardcover, 2003 ed.) Loot Price: R3,131

Discovery Miles 31 310

Repayment Terms: R293 pm x 12*

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Power-Constrained Testing of VLSI Circuits - A Guide to the IEEE 1149.4 Test Standard (Hardcover, 2003 ed.): Nicola Nicolici,...

Power-Constrained Testing of VLSI Circuits - A Guide to the IEEE 1149.4 Test Standard (Hardcover, 2003 ed.)

Nicola Nicolici, Bashir M. Al-Hashimi

Series: Frontiers in Electronic Testing, 22B

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Loot Price R3,131 Discovery Miles 31 310 | Repayment Terms: R293 pm x 12*

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This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Series:	Frontiers in Electronic Testing, 22B
Release date:	February 2003
First published:	2003
Authors:	Nicola Nicolici • Bashir M. Al-Hashimi
Dimensions:	297 x 210 x 12mm (L x W x T)
Format:	Hardcover
Pages:	178
Edition:	2003 ed.
ISBN-13:	978-1-4020-7235-2
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Electronic devices & materials > General Promotions
LSN:	1-4020-7235-X
Barcode:	9781402072352