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Offset Reduction Techniques in High-Speed Analog-to-Digital Converters - Analysis, Design and Tradeoffs (Paperback, Softcover reprint of hardcover 1st ed. 2009) Loot Price: R5,109
Discovery Miles 51 090
Offset Reduction Techniques in High-Speed Analog-to-Digital Converters - Analysis, Design and Tradeoffs (Paperback, Softcover...

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters - Analysis, Design and Tradeoffs (Paperback, Softcover reprint of hardcover 1st ed. 2009)

Pedro M. Figueiredo, Joao C. Vital

Series: Analog Circuits and Signal Processing

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Loot Price R5,109 Discovery Miles 51 090 | Repayment Terms: R479 pm x 12*

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Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.

General

Imprint: Springer
Country of origin: Netherlands
Series: Analog Circuits and Signal Processing
Release date: October 2010
First published: 2009
Authors: Pedro M. Figueiredo • Joao C. Vital
Dimensions: 235 x 155 x 21mm (L x W x T)
Format: Paperback
Pages: 382
Edition: Softcover reprint of hardcover 1st ed. 2009
ISBN-13: 978-90-481-8192-6
Categories: Books > Computing & IT > Computer communications & networking > General
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
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LSN: 90-481-8192-5
Barcode: 9789048181926

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