Networks-on-Chip: From Implementations to Programming Paradigms
provides a thorough and bottom-up exploration of the whole NoC
design space in a coherent and uniform fashion, from low-level
router, buffer and topology implementations, to routing and flow
control schemes, to co-optimizations of NoC and high-level
programming paradigms.
This lecture is intended for an advanced course on computer
architecture, suitable for graduate students or senior undergrads
who want to specialize in the area of computer architecture and
Networks-on-Chip. It is also intended for practitioners in the
industry in the area of microprocessor design, especially the
many-core processor design with a network-on-chip. The graduates
can learn many practical and theoretical lessons from this course,
and also can be motivated to delve further into the ideas and
designs proposed in this book. The industrial engineers can refer
this book to make practicing tradeoffs as well. The graduates and
engineers focus on off-chip network design can also refer this book
for deadlock-free routing algorithm designs.
Provides thorough and insightful exploration of NoC design space.
Description from low-level logic implementations to
co-optimizations of high-level program paradigms and NoCs.The
coherent and uniform description fashion offers the readers a
clear, quick and efficient exploration of NoC design spaceCovers
many novel and exciting research ideas, which encourage researchers
to further delve into these topics.Presents both engineering and
theoretical contributions. The detailed description of the router,
buffer and topology implementations, comparisons and analysis are
of high engineering value.
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