Constraining Designs for Synthesis and Timing Analysis - A Practical Guide to Synopsys Design Constraints (SDC) (Paperback, 2013 ed.)

This book serves as a hands-on guide to timing constraints in integrated circuit design. Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly. Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis, static timing analysis and placement and routing. Concepts needed for specifying timing requirements are explained in detail and then applied to specific stages in the design flow, all within the context of Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints.

General

Imprint:	Springer-Verlag New York
Country of origin:	United States
Release date:	June 2015
First published:	2013
Authors:	Sridhar Gangadharan • Sanjay Churiwala
Dimensions:	235 x 155 x 14mm (L x W x T)
Format:	Paperback
Pages:	226
Edition:	2013 ed.
ISBN-13:	978-1-4899-8916-1
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
LSN:	1-4899-8916-1
Barcode:	9781489989161

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