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Memory Controllers for Mixed-Time-Criticality Systems - Architectures, Methodologies and Trade-offs (Hardcover, 1st ed. 2016) Loot Price: R3,536

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Memory Controllers for Mixed-Time-Criticality Systems - Architectures, Methodologies and Trade-offs (Hardcover, 1st ed. 2016):...

Memory Controllers for Mixed-Time-Criticality Systems - Architectures, Methodologies and Trade-offs (Hardcover, 1st ed. 2016)

Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens

Series: Embedded Systems

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List price ~~R4,398~~ Loot Price R3,536 Discovery Miles 35 360 | Repayment Terms: R331 pm x 12* You Save R862 (20%)

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This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.

General

Imprint:	Springer International Publishing AG
Country of origin:	Switzerland
Series:	Embedded Systems
Release date:	April 2016
First published:	2016
Authors:	Sven Goossens • Karthik Chandrasekar • Benny Akesson • Kees Goossens
Dimensions:	235 x 155 x 14mm (L x W x T)
Format:	Hardcover - Cloth over boards
Pages:	202
Edition:	1st ed. 2016
ISBN-13:	978-3-319-32093-9
Categories:	Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General Promotions
LSN:	3-319-32093-9
Barcode:	9783319320939