Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power
Applications addresses the problem of reducing the supply voltage
of conventional circuits for ultralow-power operation and explains
power-efficient MTCMOS circuit design for FD-SOI devices at a
supply voltage of 0.5 V. The topics include the minimum required
knowledge of the fabrication of SOI substrates; FD-SOI devices and
the latest developments in device and process technologies; and
ultralow-voltage circuits, such as digital circuits, analog/RF
circuits, and DC-DC converters. Each ultra-low-power technique
related to devices and circuits is fully explained using figures to
help understanding.
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