Fast Simulation of Computer Architectures (Hardcover, 1995 ed.)

Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive. Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.

General

Imprint:	Springer
Country of origin:	Netherlands
Release date:	2001
First published:	June 1995
Editors:	Thomas M. Conte • Charles E. Gimarc
Dimensions:	235 x 155 x 15mm (L x W x T)
Format:	Hardcover
Pages:	244
Edition:	1995 ed.
ISBN-13:	978-0-7923-9593-5
Categories:	Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General Promotions
LSN:	0-7923-9593-X
Barcode:	9780792395935

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