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Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design
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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures (Paperback, 2013 ed.)
Loot Price: R3,276
Discovery Miles 32 760
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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures (Paperback, 2013 ed.)
Series: Lecture Notes in Electrical Engineering, 184
Expected to ship within 10 - 15 working days
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Traditionally, design space exploration for Systems-on-Chip (SoCs)
has focused on the computational aspects of the problem at hand.
However, as the number of components on a single chip and their
performance continue to increase, the communication architecture
plays a major role in the area, performance and energy consumption
of the overall system. As a result, a shift from computation-based
to communication-based design becomes mandatory. Towards this end,
network-on-chip (NoC) communication architectures have emerged
recently as a promising alternative to classical bus and
point-to-point communication architectures. In this dissertation,
we study outstanding research problems related to modeling,
analysis and optimization of NoC communication architectures. More
precisely, we present novel design methodologies, software tools
and FPGA prototypes to aid the design of application-specific NoCs.
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