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Learning from VLSI Design Experience (Hardcover, 1st ed. 2019) Loot Price: R3,723
Discovery Miles 37 230
Learning from VLSI Design Experience (Hardcover, 1st ed. 2019): Weng Fook Lee

Learning from VLSI Design Experience (Hardcover, 1st ed. 2019)

Weng Fook Lee

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Loot Price R3,723 Discovery Miles 37 230 | Repayment Terms: R349 pm x 12*

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This book shares with readers practical design knowledge gained from the author's 24 years of IC design experience. The author addresses issues and challenges faced commonly by IC designers, along with solutions and workarounds. Guidelines are described for tackling issues such as clock domain crossing, using lockup latch to cross clock domains during scan shift, implementation of scan chains across power domain, optimization methods to improve timing, how standard cell libraries can aid in synthesis optimization, BKM (best known method) for RTL coding, test compression, memory BIST, usage of signed Verilog for design requiring +ve and -ve calculations, state machine, code coverage and much more. Numerous figures and examples are provided to aid the reader in understanding the issues and their workarounds.

General

Imprint: Springer Nature Switzerland AG
Country of origin: Switzerland
Release date: February 2019
First published: 2019
Authors: Weng Fook Lee
Dimensions: 235 x 155mm (L x W)
Format: Hardcover
Pages: 214
Edition: 1st ed. 2019
ISBN-13: 978-3-03-003237-1
Categories: Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
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LSN: 3-03-003237-X
Barcode: 9783030032371

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