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This book presents selected articles from INDIA SMART UTILTY WEEK
(ISUW 2020), which is the sixth edition of the Conference cum
Exhibition on Smart Grids and Smart Cities, organized by India
Smart Grid Forum from March 03-07, 2020, in New Delhi, India. ISGF
is a public private partnership initiative of the Ministry of
Power, Govt. of India, with the mandate of accelerating smart grid
deployments across the country. This book gives current scenario
updates of Indian power sector business. It also highlights various
disruptive technologies for power sector business.
A voltage-controlled oscillator (VCO) is one of the most important
basic building blocks for analog and digital circuits. There are
different implementations of VCOs. One of them is the ring
oscillator based VCO. A ring oscillator based Temperature Sensors
designed is sensitive for small variations of temperature. The
Temperature is linearly dependent on the oscillation frequency of
ring oscillator, as a way of converting temperature to a digital
read out. The proposed temperature sensors occupies smaller silicon
area with higher resolution than the conventional temperature
sensors based on band gap reference. It was designed to achieve
better than 1 DEGREESo C of temperature resolution, which is
suitable for almost any application of an integrated CMOS
temperature sensor. Special attention has been given to the
integration of design of two different Ring Oscillators in order to
achieve lower voltage operation when the design is implemented in
an advanced CMOS p
Arithmetic circuits, like adders and multipliers, are one of the
basic components in the design of communication circuits. In fact
8.72% of all instructions in a typical scientific program are
multiplies. The multiplier is a fairly large block of a computing
system. Multiplier is not only a high-delay block but also a
significant source of power dissipation. That's why, if one also
aims to minimize power consumption, it is of great interest to
identify the techniques to be applied to reduce delay by using
various delay optimizations. Array architecture is a popular
technique to implement the multipliers due to its compact
structure. In this book, six array multiplier circuits using
different AND cells and XOR gates have been designed, simulated,
analyzed and compared. This analysis should help shed some light on
the low power and high throughput 2x2 array multiplier cells and
should be especially useful for post graduate students and research
scholars working in low power VLSI circuit design field."
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