This book presents fundamental requirements, electrical specification, and parameter tradeoffs of wearable EEG acquisition circuits, especially those compatible with dry electrodes for user-friendly recordings.  The authors introduce active electrode, the most promising solution for dry electrodes-based EEG measurement. This architectural concept has been combined with various, innovative circuit design techniques to illustrate structured IC design methodologies for high performance EEG recording. This book also gives examples on the design, implementation and evaluation of three generations of active electrode ICs.

This book describes the design and implementation of energy-efficient smart (digital output) temperature sensors in CMOS technology. To accomplish this, a new readout topology, namely the zoom-ADC, is presented. It combines a coarse SAR-ADC with a fine Sigma-Delta (SD) ADC. The digital result obtained from the coarse ADC is used to set the reference levels of the SD-ADC, thereby zooming its full-scale range into a small region around the input signal. This technique considerably reduces the SD-ADC's full-scale range, and notably relaxes the number of clock cycles needed for a given resolution, as well as the DC-gain and swing of the loop-filter. Both conversion time and power-efficiency can be improved, which results in a substantial improvement in energy-efficiency. Two BJT-based sensor prototypes based on 1st-order and 2nd-order zoom-ADCs are presented. They both achieve inaccuracies of less than +/-0.2 DegreesC over the military temperature range (-55 DegreesC to 125 DegreesC). A prototype capable of sensing temperatures up to 200 DegreesC is also presented. As an alternative to BJTs, sensors based on dynamic threshold MOSTs (DTMOSTs) are also presented. It is shown that DTMOSTs are capable of achieving low inaccuracy (+/-0.4 DegreesC over the military temperature range) as well as sub-1V operation, making them well suited for use in modern CMOS processes.

Dynamic Offset-Compensated CMOS Amplifiers describes the theory, design and realization of dynamic offset compensated CMOS amplifiers. It focuses on the design of general-purpose wide-band operational amplifiers and instrumentation amplifiers.
Two offset compensation techniques are described: auto-zeroing and chopping. Several topologies are discussed, with which these techniques can be used in the design of wide-band dynamic offset-compensated amplifiers. Four implementations are discussed in detail: two low-offset wide-band operational amplifiers, a low-offset instrumentation amplifier, and a low-offset current-sense amplifier, which can sense the current drawn from supply voltages up to 28V .

This book presents fundamental requirements, electrical specification, and parameter tradeoffs of wearable EEG acquisition circuits, especially those compatible with dry electrodes for user-friendly recordings. The authors introduce active electrode, the most promising solution for dry electrodes-based EEG measurement. This architectural concept has been combined with various, innovative circuit design techniques to illustrate structured IC design methodologies for high performance EEG recording. This book also gives examples on the design, implementation and evaluation of three generations of active electrode ICs.

Dynamic Offset-Compensated CMOS Amplifiers describes the theory, design and realization of dynamic offset compensated CMOS amplifiers. It focuses on the design of general-purpose wide-band operational amplifiers and instrumentation amplifiers. Two offset compensation techniques are described: auto-zeroing and chopping. Several topologies are discussed, with which these techniques can be used in the design of wide-band dynamic offset-compensated amplifiers. Four implementations are discussed in detail: two low-offset wide-band operational amplifiers, a low-offset instrumentation amplifier, and a low-offset current-sense amplifier, which can sense the current drawn from supply voltages up to 28V .