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Remote protein homology detection is a problem of detecting evolutionary relationship between proteins at low sequence similarity level. Among several problems in remote protein homology detection include the questions of determining which combination of multiple alignment and classification techniques is the best as well as the misalignment of protein sequences during the alignment process. Therefore, this study deals with remote protein homology detection via assessing the impact of using structural information on protein multiple alignments over sequence information. This study further presents the best combinations of multiple alignment and classification programs to be chosen. This study also improves the quality of the multiple alignments via integration of a refinement algorithm.
This study assists in solving the problem of formalizing knowledge in manufacturing requirements domain focus in product structure. The first factor that has to be considered to produce the best solution for this problem is by developing ontology to standardize the engineering terms in this domain and annotation to analyze the usage of shared terms between products. The second factor that has to be considered in order to enable the ontology to be reused and extended is by developing ontology development methodology and prepares ontology artifacts that are shareable and publicly available on the World Wide Web (WWW). Finally, the third factor that has to be considered is by developing a searching algorithm in order to apply the ontology in 2D CAD engineering information extraction. This searching algorithm can be used to identify the synonymous term and subsequently helps in complementation and creation of product structure.
The book is pivoted to the usage of the 2-D Discrete Cosine Transform (DCT) technique for image compression, wherein the readers will come across the development of a new and faster 2-D DCT algorithm, and its hardware implementation. It describes the evolution of VHDL codes by implementing DSP Design Architect tools from Mentor Graphics in respect of hardware chip realization. However, efforts are also made simultaneously towards the development of the relevant algorithm in MATLAB platform in order to verify the functionality of the developed VHDL codes. The synthesis of VHDL codes using Quartus Integrated Synthesis (QIS) tools was performed by implementing Altera's library (90-nm) to make the synthesized design downloaded to a Field Programmable Gate Array (FPGA) board. The synthesis software was also used to optimize the performance of the design related features such as chip area, delay, clock frequency and power dissipation. The book presents the development of fast processor in a lucid fashion so that the readers would grasp the theme presented, and be motivated to actually realize the developed processor as well as implement the ideas in their own designs.
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