The design process of embedded systems has changed substantially in recent years. One of the main reasons for this change is the pressure to shorten time-to-market when designing digital systems. To shorten the product cycles, programmable processes are used to implement more and more functionality of the embedded system. Therefore, nowadays, embedded systems are very often implemented by heterogeneous systems consisting of ASICs, processors, memories and peripherals. As a consequence, the research topic of hardware/software co-design, dealing with the problems of designing these heterogeneous systems, has gained great importance. Hardware/Software Co-design for Data Flow Dominated Embedded Systems introduces the different tasks of hardware/software co-design including system specification, hardware/software partitioning, co-synthesis and co-simulation. The book summarizes and classifies state-of-the-art co-design tools and methods for these tasks. In addition, the co-design tool COOL is presented which solves the co-design tasks for the class of data-flow dominated embedded systems. In Hardware/Software Co-design for Data Flow Dominated Embedded Systems the primary emphasis has been put on the hardware/software partitioning and the co-synthesis phase and their coupling. In contrast to many other publications in this area, a mathematical formulation of the hardware/software partitioning problem is given. This problem formulation supports target architectures consisting of multiple processors and multiple ASICs. Several novel approaches are presented and compared for solving the partitioning problem, including an MILP approach, a heuristic solution and an approach based on geneticalgorithms. The co-synthesis phase is based on the idea of controlling the system by means of a static run-time scheduler implemented in hardware. New algorithms are introduced which generate a complete set of hardware and software specifications required to implement heterogeneous systems. All of these techniques are described in detail and exemplified. Hardware/Software Co-design for Data Flow Dominated Embedded Systems is intended to serve students and researchers working on hardware/software co-design. At the same time the variety of presented techniques automating the design tasks of hardware/software systems will be of interest to industrial engineers and designers of digital systems. From the foreword by Peter Marwedel: Niemann's method should be known by all persons working in the field. Hence, I recommend this book for everyone who is interested in hardware/software co-design.

Many of the modern applications of microelectronics require hugeamounts of computations. Despite all recent improvements in fabrication technologies, some of these computations have to be performed in hardware in order to meet deadlines. However, controlling computations by software is frequently pre ferred due to the larger flexibility. Hence, in general, modern applications re quire a mix of software-based and hardware-based computations. Applications using this mix can be designed with the help of hardware/software co-design systems. Many such co-design systems have been described so far (references can be found in this book), but many of these are based on heuristics. In this book, Niemann describes a co-design system which is based on sound modeling techniques. This system has the following salient features: * Precise cost and performance figures Design decisions for implementing a certain function in hardware or software are based on 'cost and performance figures for the different design alterna tives. Hence, good designs can only be expected if these figures are accurate. In order to achieve excellent accuracy, Niemann takes a new approach: the cost of software implementations is derived from the data available about the target processors and from knowledge about the code size. the performance of software implement at ions is computed by compiling the given function and then using static analysis for computing worst case execution times. the cost of hardware implementation is estimated by running higher-Ievel synthesis tools. the performance of hardware implementations is again computed by us ing static analysis.