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This book provides a comprehensive introduction to hardware
security, from specification to implementation. Applications
discussed include embedded systems ranging from small RFID tags to
satellites orbiting the earth. The authors describe a design and
synthesis flow, which will transform a given circuit into a secure
design incorporating counter-measures against fault attacks. In
order to address the conflict between testability and security, the
authors describe innovative design-for-testability (DFT)
computer-aided design (CAD) tools that support security challenges,
engineered for compliance with existing, commercial tools. Secure
protocols are discussed, which protect access to necessary test
infrastructures and enable the design of secure access controllers.
This book provides a comprehensive introduction to hardware
security, from specification to implementation. Applications
discussed include embedded systems ranging from small RFID tags to
satellites orbiting the earth. The authors describe a design and
synthesis flow, which will transform a given circuit into a secure
design incorporating counter-measures against fault attacks. In
order to address the conflict between testability and security, the
authors describe innovative design-for-testability (DFT)
computer-aided design (CAD) tools that support security challenges,
engineered for compliance with existing, commercial tools. Secure
protocols are discussed, which protect access to necessary test
infrastructures and enable the design of secure access controllers.
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Euro-Par 2021: Parallel Processing Workshops - Euro-Par 2021 International Workshops, Lisbon, Portugal, August 30-31, 2021, Revised Selected Papers (Paperback, 1st ed. 2022)
Ricardo Chaves, Dora B. Heras, Aleksandar ILIC, Didem Unat, Rosa M Badia, …
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R2,835
Discovery Miles 28 350
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Ships in 10 - 15 working days
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This book constitutes revised selected papers from the workshops
held at the 27th International Conference on Parallel and
Distributed Computing, Euro-Par 2021, which took place in Portugal,
in August 2021. The workshops were held virtually due to the
coronavirus pandemic.The 39 full papers presented in this volume
were carefully reviewed and selected from numerous submissions. The
papers cover all aspects of parallel and distributed processing.
These range from theory to practice, from small to the largest
parallel and distributed systems and infrastructures, from
fundamental computational problems to full-edged applications, from
architecture, compiler, language and interface design and
implementation to tools, support infrastructures, and application
performance aspects.
This work discusses a Secure Computing Module (SCM) for
reconfigurable computing systems. Secure Computing (SC) provides a
protected and reliable computational environment, where data
security and protection against malicious attacks to the system is
assured. SC is strongly based on encryption algorithms and on the
attestation of the executed functions. The use of SC on
reconfigurable devices has the advantage of being highly adaptable
to the application and the user requirements, while providing high
performances. Moreover, it is adaptable to new algorithms,
protocols, and threats. In work, high performance cryptographic
units for symmetric encryption and hash functions are presented in
order to achieve a high performance SCM. A method to attest
dynamically reconfigured hardware structures is also proposed,
without penalizing the performance of the SCM. The presented
attestation mechanism allows the configuration bitstreams to be
stored in unsecured locations, such as on an external memory or the
internet, without posing a security threat. Overall, this
dissertation demonstrates the applicability and identifies the main
advantages of implementing SC on reconfigurable systems.
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