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Testing Static Random Access Memories covers testing of one of the
important semiconductor memories types; it addresses testing of
static random access memories (SRAMs), both single-port and
multi-port. It contributes to the technical acknowledge needed by
those involved in memory testing, engineers and researchers. The
book begins with outlining the most popular SRAMs architectures.
Then, the description of realistic fault models, based on defect
injection and SPICE simulation, are introduced. Thereafter, high
quality and low cost test patterns, as well as test strategies for
single-port, two-port and any p-port SRAMs are presented, together
with some preliminary test results showing the importance of the
new tests in reducing DPM level. The impact of the port
restrictions (e.g., read-only ports) on the fault models, tests,
and test strategies is also discussed.
Features:
-Fault primitive based analysis of memory faults,
-A complete framework of and classification memory faults,
-A systematic way to develop optimal and high quality memory test
algorithms,
-A systematic way to develop test patterns for any multi-port SRAM,
-Challenges and trends in embedded memory testing.
Testing Static Random Access Memories covers testing of one of the
important semiconductor memories types; it addresses testing of
static random access memories (SRAMs), both single-port and
multi-port. It contributes to the technical acknowledge needed by
those involved in memory testing, engineers and researchers. The
book begins with outlining the most popular SRAMs architectures.
Then, the description of realistic fault models, based on defect
injection and SPICE simulation, are introduced. Thereafter, high
quality and low cost test patterns, as well as test strategies for
single-port, two-port and any p-port SRAMs are presented, together
with some preliminary test results showing the importance of the
new tests in reducing DPM level. The impact of the port
restrictions (e.g., read-only ports) on the fault models, tests,
and test strategies is also discussed.
Features:
-Fault primitive based analysis of memory faults,
-A complete framework of and classification memory faults,
-A systematic way to develop optimal and high quality memory test
algorithms,
-A systematic way to develop test patterns for any multi-port SRAM,
-Challenges and trends in embedded memory testing.
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