This book describes recent findings in the domain of Boolean logic and Boolean algebra, covering application domains in circuit and system design, but also basic research in mathematics and theoretical computer science.  Content includes invited chapters and a selection of the best papers presented at the 15th annual International Workshop on Boolean Problems.

This book highlights historical explanations to and roots of present phenomena of violence, insecurity, and law enforcement in Central America. Violence and crime are among the most discussed topics in Central America today, and sensationalism and fear of crime is as present as the increase of private security, the re-militarization of law enforcement, political populism, and mano dura policies. The contributors to this volume discuss historical forms, paths, continuities, and changes of violence and its public and political discussion in the region. This book thus offers in-depth analysis of different patterns of violence, their reproduction over time, their articulation in the present, and finally their discursive mobilization.

This book introduces several novel approaches to pave the way for the next generation of integrated circuits, which can be successfully and reliably integrated, even in safety-critical applications. The authors describe new measures to address the rising challenges in the field of design for testability, debug, and reliability, as strictly required for state-of-the-art circuit designs. In particular, this book combines formal techniques, such as the Satisfiability (SAT) problem and the Bounded Model Checking (BMC), to address the arising challenges concerning the increase in test data volume, as well as test application time and the required reliability. All methods are discussed in detail and evaluated extensively, while considering industry-relevant benchmark candidates. All measures have been integrated into a common framework, which implements standardized software/hardware interfaces.

This book introduces several novel approaches to pave the way for the next generation of integrated circuits, which can be successfully and reliably integrated, even in safety-critical applications. The authors describe new measures to address the rising challenges in the field of design for testability, debug, and reliability, as strictly required for state-of-the-art circuit designs. In particular, this book combines formal techniques, such as the Satisfiability (SAT) problem and the Bounded Model Checking (BMC), to address the arising challenges concerning the increase in test data volume, as well as test application time and the required reliability. All methods are discussed in detail and evaluated extensively, while considering industry-relevant benchmark candidates. All measures have been integrated into a common framework, which implements standardized software/hardware interfaces.