This book presented a complete implementation of an embedded controlled smart security system, which is capable of detecting the presence of object without any human intervention. For detecting the object, we have designed and implemented Time-of-Flight (ToF) measurement based novel Top Edge Detection (TED) algorithm. By executing the TED algorithm, a moveable sensor plate will arrive at a position followed by the top edge of the object. From this position, the image capturing sensor captures an instance image of the object. After capturing the image, it is compressed before being sent into the central storage area, to reduce the amount of storage space requirement. In order to reduce the size of the captured image, it is required to compromise the quality of the image. A detailed analysis is performed to make a trade-off between size and quality of the captured image using the BTC based image compression algorithm. Besides, a prototype of the system is further implemented with low-cost components; functionality of which eliminates human dependency, and eliminates huge storage requirement and these factors hence provides high potential for implementing any smart security system.

The book is pivoted to the usage of the 2-D Discrete Cosine Transform (DCT) technique for image compression, wherein the readers will come across the development of a new and faster 2-D DCT algorithm, and its hardware implementation. It describes the evolution of VHDL codes by implementing DSP Design Architect tools from Mentor Graphics in respect of hardware chip realization. However, efforts are also made simultaneously towards the development of the relevant algorithm in MATLAB platform in order to verify the functionality of the developed VHDL codes. The synthesis of VHDL codes using Quartus Integrated Synthesis (QIS) tools was performed by implementing Altera's library (90-nm) to make the synthesized design downloaded to a Field Programmable Gate Array (FPGA) board. The synthesis software was also used to optimize the performance of the design related features such as chip area, delay, clock frequency and power dissipation. The book presents the development of fast processor in a lucid fashion so that the readers would grasp the theme presented, and be motivated to actually realize the developed processor as well as implement the ideas in their own designs.