This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.
. Most up-to-date coverage of design for testability.
. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
. Lecture slides and exercise solutions for all chapters are now available.
. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.

Branch-and-bound search has been known for a long time and has been widely used in solving a variety of problems in computer-aided design (CAD) and many important optimization problems. In many applications, the classic branch-and-bound search methods perform duplications of computations, or rely on the search decision trees which keep track of the branch-and-bound search processes. In CAD and many other technical fields, the computational cost of constructing branch-and-bound search decision trees in solving large scale problems is prohibitive and duplications of computations are intolerable. Efficient branch-and-bound methods are needed to deal with today's computational challenges. Efficient branch-and-bound methods must not duplicate computations. Efficient Branch and Bound Search with Application to Computer-Aided Design describes an efficient branch-and-bound method for logic justification, which is fundamental to automatic test pattern generation (ATPG), redundancy identification, logic synthesis, minimization, verification, and other problems in CAD. The method is called justification equivalence, based on the observation that justification processes may share identical subsequent search decision sequences. With justification equivalence, duplication of computations is avoided in the dynamic branch-and-bound search process without using search decision trees. Efficient Branch and Bound Search with Application to Computer-Aided Design consists of two parts. The first part, containing the first three chapters, provides the theoretical work. The second part deals with applications, particularly ATPG for sequential circuits. This book is particularly useful to readers who are interested in the design and test of digital circuits.

In today's digital design environment, engineers must achieve quick turn-around time with ready accesses to circuit synthesis and simulation applications. This type of productivity relies on the principles and practices of computer aided design (CAD). Digital Design: Basic Concepts and Principles addresses the many challenging issues critical to today's digital design practices such as hazards and logic minimization, finite-state-machine synthesis, cycles and races, and testability theories while providing hands-on experience using one of the industry's most popular design application, Xilinx Web PACK" ."

The authors begin by discussing conventional and unconventional number systems, binary coding theories, and arithmetic as well as logic functions and Boolean algebra. Building upon classic theories of digital systems, the book illustrates the importance of logic minimization using the Karnaugh map technique. It continues by discussing implementation options and examining the pros and cons of each method in addition to an assessment of tradeoffs that often accompany design practices. The book also covers testability, emphasizing that a good digital design must be easy to verify and test with the lowest cost possible. Throughout the text, the authors analyze combinational and sequential logic elements and illustrate the designs of these components in structural, hierarchical, and behavior VHDL descriptions.

Coveringfundamentals and best practices, Digital Design: Basic Concepts and Principles provides you with critical knowledge of how each digital component ties together to form a system and develops the skills you need to design and simulate these digital components using modern CAD software.

Branch-and-bound search has been known for a long time and has been widely used in solving a variety of problems in computer-aided design (CAD) and many important optimization problems. In many applications, the classic branch-and-bound search methods perform duplications of computations, or rely on the search decision trees which keep track of the branch-and-bound search processes. In CAD and many other technical fields, the computational cost of constructing branch-and-bound search decision trees in solving large scale problems is prohibitive and duplications of computations are intolerable. Efficient branch-and-bound methods are needed to deal with today's computational challenges. Efficient branch-and-bound methods must not duplicate computations. Efficient Branch and Bound Search with Application to Computer-Aided Design describes an efficient branch-and-bound method for logic justification, which is fundamental to automatic test pattern generation (ATPG), redundancy identification, logic synthesis, minimization, verification, and other problems in CAD. The method is called justification equivalence, based on the observation that justification processes may share identical subsequent search decision sequences. With justification equivalence, duplication of computations is avoided in the dynamic branch-and-bound search process without using search decision trees. Efficient Branch and Bound Search with Application to Computer-Aided Design consists of two parts. The first part, containing the first three chapters, provides the theoretical work. The second part deals with applications, particularly ATPG for sequential circuits. This book is particularly useful to readers who are interested in the design and test of digital circuits.