This book introduces new logic primitives for electronic design automation tools. The author approaches fundamental EDA problems from a different, unconventional perspective, in order to demonstrate the key role of rethinking EDA solutions in overcoming technological limitations of present and future technologies. The author discusses techniques that improve the efficiency of logic representation, manipulation and optimization tasks by taking advantage of majority and biconditional logic primitives. Readers will be enabled to accelerate formal methods by studying core properties of logic circuits and developing new frameworks for logic reasoning engines.

This book introduces readers to various threats faced during design and fabrication by today's integrated circuits (ICs) and systems. The authors discuss key issues, including illegal manufacturing of ICs or "IC Overproduction," insertion of malicious circuits, referred as "Hardware Trojans", which cause in-field chip/system malfunction, and reverse engineering and piracy of hardware intellectual property (IP). The authors provide a timely discussion of these threats, along with techniques for IC protection based on hardware obfuscation, which makes reverse-engineering an IC design infeasible for adversaries and untrusted parties with any reasonable amount of resources. This exhaustive study includes a review of the hardware obfuscation methods developed at each level of abstraction (RTL, gate, and layout) for conventional IC manufacturing, new forms of obfuscation for emerging integration strategies (split manufacturing, 2.5D ICs, and 3D ICs), and on-chip infrastructure needed for secure exchange of obfuscation keys- arguably the most critical element of hardware obfuscation.

This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection.

One critical barrier leading to successful implementation of flexible manufacturing and related automated systems is the ever-increasing complexity of their modeling, analysis, simulation, and control. Research and development over the last three decades has provided new theory and graphical tools based on Petri nets and related concepts for the design of such systems. The purpose of this book is to introduce a set of Petri-net-based tools and methods to address a variety of problems associated with the design and implementation of flexible manufacturing systems (FMSs), with several implementation examples.There are three ways this book will directly benefit readers. First, the book will allow engineers and managers who are responsible for the design and implementation of modern manufacturing systems to evaluate Petri nets for applications in their work. Second, it will provide sufficient breadth and depth to allow development of Petri-net-based industrial applications. Third, it will allow the basic Petri net material to be taught to industrial practitioners, students, and academic researchers much more efficiently. This will foster further research and applications of Petri nets in aiding the successful implementation of advanced manufacturing systems.

This book describes new, fuzzy logic-based mathematical apparatus, which enable readers to work with continuous variables, while implementing whole circuit simulations with speed, similar to gate-level simulators and accuracy, similar to circuit-level simulators. The author demonstrates newly developed principles of digital integrated circuit simulation and optimization that take into consideration various external and internal destabilizing factors, influencing the operation of digital ICs. The discussion includes factors including radiation, ambient temperature, electromagnetic fields, and climatic conditions, as well as non-ideality of interconnects and power rails.

This book explains the group representation theory for quantum theory in the language of quantum theory. As is well known, group representation theory is very strong tool for quantum theory, in particular, angular momentum, hydrogen-type Hamiltonian, spin-orbit interaction, quark model, quantum optics, and quantum information processing including quantum error correction. To describe a big picture of application of representation theory to quantum theory, the book needs to contain the following six topics, permutation group, SU(2) and SU(d), Heisenberg representation, squeezing operation, Discrete Heisenberg representation, and the relation with Fourier transform from a unified viewpoint by including projective representation. Unfortunately, although there are so many good mathematical books for a part of six topics, no book contains all of these topics because they are too segmentalized. Further, some of them are written in an abstract way in mathematical style and, often, the materials are too segmented. At least, the notation is not familiar to people working with quantum theory. Others are good elementary books, but do not deal with topics related to quantum theory. In particular, such elementary books do not cover projective representation, which is more important in quantum theory. On the other hand, there are several books for physicists. However, these books are too simple and lack the detailed discussion. Hence, they are not useful for advanced study even in physics. To resolve this issue, this book starts with the basic mathematics for quantum theory. Then, it introduces the basics of group representation and discusses the case of the finite groups, the symmetric group, e.g. Next, this book discusses Lie group and Lie algebra. This part starts with the basics knowledge, and proceeds to the special groups, e.g., SU(2), SU(1,1), and SU(d). After the special groups, it explains concrete applications to physical systems, e.g., angular momentum, hydrogen-type Hamiltonian, spin-orbit interaction, and quark model. Then, it proceeds to the general theory for Lie group and Lie algebra. Using this knowledge, this book explains the Bosonic system, which has the symmetries of Heisenberg group and the squeezing symmetry by SL(2,R) and Sp(2n,R). Finally, as the discrete version, this book treats the discrete Heisenberg representation which is related to quantum error correction. To enhance readers' undersnding, this book contains 54 figures, 23 tables, and 111 exercises with solutions.

This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describes new mitigation strategies targeting commercial designs. Coverage includes novel soft error mitigation techniques such as the Dynamic Threshold Technique and Soft Error Filtering based on Transmission gate with varied gate and body bias. The discussion also includes modeling of SE crosstalk noise, delay and speed-up effects. Various mitigation strategies to eliminate SE coupling effects are also introduced. Coverage also includes the reliability of low power energy-efficient designs and the impact of leakage power consumption optimizations on soft error robustness. The author presents an analysis of various power optimization techniques, enabling readers to make design choices that reduce static power consumption and improve soft error reliability at the same time.

This book introduces new logic primitives for electronic design automation tools. The author approaches fundamental EDA problems from a different, unconventional perspective, in order to demonstrate the key role of rethinking EDA solutions in overcoming technological limitations of present and future technologies. The author discusses techniques that improve the efficiency of logic representation, manipulation and optimization tasks by taking advantage of majority and biconditional logic primitives. Readers will be enabled to accelerate formal methods by studying core properties of logic circuits and developing new frameworks for logic reasoning engines.

This book explains for readers how 3D chip stacks promise to increase the level of on-chip integration, and to design new heterogeneous semiconductor devices that combine chips of different integration technologies (incl. sensors) in a single package of the smallest possible size. The authors focus on heterogeneous 3D integration, addressing some of the most important challenges in this emerging technology, including contactless, optics-based, and carbon-nanotube-based 3D integration, as well as signal-integrity and thermal management issues in copper-based 3D integration. Coverage also includes the 3D heterogeneous integration of power sources, photonic devices, and non-volatile memories based on new materials systems.

This book offers readers a clear guide to implementing engineering applications with FPGAs, from the mathematical description to the hardware synthesis, including discussion of VHDL programming and co-simulation issues. Coverage includes FPGA realizations such as: chaos generators that are described from their mathematical models; artificial neural networks (ANNs) to predict chaotic time series, for which a discussion of different ANN topologies is included, with different learning techniques and activation functions; random number generators (RNGs) that are realized using different chaos generators, and discussions of their maximum Lyapunov exponent values and entropies. Finally, optimized chaotic oscillators are synchronized and realized to implement a secure communication system that processes black and white and grey-scale images. In each application, readers will find VHDL programming guidelines and computer arithmetic issues, along with co-simulation examples with Active-HDL and Simulink.The whole book provides a practical guide to implementing a variety of engineering applications from VHDL programming and co-simulation issues, to FPGA realizations of chaos generators, ANNs for chaotic time-series prediction, RNGs and chaotic secure communications for image transmission.

This proven textbook guides readers to a thorough understanding of the theory and design of operational amplifiers (OpAmps). The core of the book presents systematically the design of operational amplifiers, classifying them into a periodic system of nine main overall configurations, ranging from one gain stage up to four or more stages. This division enables circuit designers to recognize quickly, understand, and choose optimal configurations. Characterization of operational amplifiers is given by macro models and error matrices, together with measurement techniques for their parameters. Definitions are given for four types of operational amplifiers depending on the grounding of their input and output ports. Many famous designs are evaluated in depth, using a carefully structured approach enhanced by numerous figures. In order to reinforce the concepts introduced and facilitate self-evaluation of design skills, the author includes problems with detailed solutions, as well as simulation exercises.

This book provides a single-source reference on the use of carbon nanotubes (CNTs) as interconnect material for horizontal, on-chip and 3D interconnects. The authors demonstrate the uses of bundles of CNTs, as innovative conducting material to fabricate interconnect through-silicon vias (TSVs), in order to improve the performance, reliability and integration of 3D integrated circuits (ICs). This book will be first to provide a coherent overview of exploiting carbon nanotubes for 3D interconnects covering aspects from processing, modeling, simulation, characterization and applications. Coverage also includes a thorough presentation of the application of CNTs as horizontal on-chip interconnects which can potentially revolutionize the nanoelectronics industry. This book is a must-read for anyone interested in the state-of-the-art on exploiting carbon nanotubes for interconnects for both 2D and 3D integrated circuits.

This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessible to software engineers by covering different state-of-the-art high-level synthesis approaches (e.g., OpenCL and several C-to-gates compilers). It introduces FPGA technology, its programming model, and how various applications can be implemented on FPGAs without going through low-level hardware design phases. Readers will get a realistic sense for problems that are suited for FPGAs and how to implement them from a software designer's point of view. The authors demonstrate that FPGAs and their programming model reflect the needs of stream processing problems much better than traditional CPU or GPU architectures, making them well-suited for a wide variety of systems, from embedded systems performing sensor processing to large setups for Big Data number crunching. This book serves as an invaluable tool for software designers and FPGA design engineers who are interested in high design productivity through behavioural synthesis, domain-specific compilation, and FPGA overlays. Introduces FPGA technology to software developers by giving an overview of FPGA programming models and design tools, as well as various application examples; Provides a holistic analysis of the topic and enables developers to tackle the architectural needs for Big Data processing with FPGAs; Explains the reasons for the energy efficiency and performance benefits of FPGA processing; Provides a user-oriented approach and a sense for where and how to apply FPGA technology.

This book brings together a selection of the best papers from the eighteenth edition of the Forum on specification and Design Languages Conference (FDL), which took place on September 14-16, 2015, in Barcelona, Spain. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit's performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

This book describes novel software concepts to increase reliability under user-defined constraints. The authors' approach bridges, for the first time, the reliability gap between hardware and software. Readers will learn how to achieve increased soft error resilience on unreliable hardware, while exploiting the inherent error masking characteristics and error (stemming from soft errors, aging, and process variations) mitigations potential at different software layers.

This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.

This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desired number of processing elements (PEs) or region within a TCPA exclusively for an application according to performance requirements. It not only presents models for implementing invasion strategies in hardware, but also proposes two distinct design flavors for dedicated hardware components to support invasion control on TCPAs.

This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets.

This book provides the most comprehensive and consistent survey of the field of IC design for Biological Sensing and Processing. The authors describe a multitude of applications that require custom CMOS IC design and highlight the techniques in analog and mixed-signal circuit design that potentially can cross boundaries and benefit the very wide community of bio-medical engineers.

This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.