Rising consumer demand for low power consumption electronics has
generated a need for scalable and reliable memory devices with low
power consumption. At present, scaling memory devices and lowering
their power consumption is becoming more difficult due to
unresolved challenges, such as short channel effect, Drain Induced
Barrier Lowering (DIBL), and sub-surface punch-through effect, all
of which cause high leakage currents. As a result, the introduction
of different memory architectures or materials is crucial.
Nanomaterials-based Charge Trapping Memory Devices provides a
detailed explanation of memory device operation and an in-depth
analysis of the requirements of future scalable and low powered
memory devices in terms of new materials properties. The book
presents techniques to fabricate nanomaterials with the desired
properties. Finally, the book highlights the effect of
incorporating such nanomaterials in memory devices. This book is an
important reference for materials scientists and engineers, who are
looking to develop low-powered solutions to meet the growing demand
for consumer electronic products and devices.
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