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High-Level Power Analysis and Optimization (Hardcover, 1998 ed.) Loot Price: R3,202
Discovery Miles 32 020
High-Level Power Analysis and Optimization (Hardcover, 1998 ed.): Anand Raghunathan, Niraj K. Jha, Sujit Dey

High-Level Power Analysis and Optimization (Hardcover, 1998 ed.)

Anand Raghunathan, Niraj K. Jha, Sujit Dey

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Loot Price R3,202 Discovery Miles 32 020 | Repayment Terms: R300 pm x 12*

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High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level. High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power. High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.

General

Imprint: Springer
Country of origin: Netherlands
Release date: 2001
First published: 1998
Authors: Anand Raghunathan • Niraj K. Jha • Sujit Dey
Dimensions: 254 x 178 x 12mm (L x W x T)
Format: Hardcover
Pages: 175
Edition: 1998 ed.
ISBN-13: 978-0-7923-8073-3
Categories: Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > General
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LSN: 0-7923-8073-8
Barcode: 9780792380733

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