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Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Electronic devices & materials > Semi-conductors & super-conductors

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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies - Process-Aware SRAM Design and Test (Hardcover, 2008 ed.) Loot Price: R4,415
Discovery Miles 44 150
Repayment Terms: R414 pm x 12*
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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies - Process-Aware SRAM Design and Test (Hardcover, 2008...

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies - Process-Aware SRAM Design and Test (Hardcover, 2008 ed.)

Andrei Pavlov, Manoj Sachdev

Series: Frontiers in Electronic Testing, 40

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Loot Price R4,415 Discovery Miles 44 150 | Repayment Terms: R414 pm x 12*

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The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.

General

Imprint: Springer-Verlag New York
Country of origin: United States
Series: Frontiers in Electronic Testing, 40
Release date: June 2008
First published: June 2008
Authors: Andrei Pavlov • Manoj Sachdev
Dimensions: 235 x 155 x 19mm (L x W x T)
Format: Hardcover
Pages: 194
Edition: 2008 ed.
ISBN-13: 978-1-4020-8362-4
Categories: Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Electronic devices & materials > Semi-conductors & super-conductors
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LSN: 1-4020-8362-9
Barcode: 9781402083624

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