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Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design

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Formal Verification of Floating-Point Hardware Design - A Mathematical Approach (Hardcover, 2nd ed. 2022) Loot Price: R3,738
Discovery Miles 37 380
Formal Verification of Floating-Point Hardware Design - A Mathematical Approach (Hardcover, 2nd ed. 2022): David M. Russinoff

Formal Verification of Floating-Point Hardware Design - A Mathematical Approach (Hardcover, 2nd ed. 2022)

David M. Russinoff

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Loot Price R3,738 Discovery Miles 37 380 | Repayment Terms: R350 pm x 12*

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This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design, Second Edition advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies. The theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations. As a basis for the formal verification of such implementations, high-level specifications of the basic arithmetic instructions of several major industry-standard floating-point architectures are presented, including all details pertaining to the handling of exceptional conditions. The methodology is illustrated in the comprehensive verification of a variety of state-of-the-art commercial floating-point designs developed by Arm Holdings. This revised edition reflects the evolving microarchitectures and increasing sophistication of Arm processors, and the variation in the design goals of execution speed, hardware area requirements, and power consumption. Many new results have been added to Parts I-III (Register-Transfer Logic, Floating-Point Arithmetic, and Implementation of Elementary Operations), extending the theory and describing new techniques. These were derived as required in the verification of the new RTL designs described in Part V.

General

Imprint: Springer Nature Switzerland AG
Country of origin: Switzerland
Release date: March 2022
First published: 2022
Authors: David M. Russinoff
Dimensions: 235 x 155mm (L x W)
Format: Hardcover
Pages: 436
Edition: 2nd ed. 2022
ISBN-13: 978-3-03-087180-2
Categories: Books > Computing & IT > General theory of computing > Data structures
Books > Computing & IT > Computer programming > Algorithms & procedures
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
LSN: 3-03-087180-0
Barcode: 9783030871802

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