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Verilog HDL Design Examples (Hardcover) Loot Price: R5,105
Discovery Miles 51 050
Verilog HDL Design Examples (Hardcover): Joseph Cavanagh

Verilog HDL Design Examples (Hardcover)

Joseph Cavanagh

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Loot Price R5,105 Discovery Miles 51 050 | Repayment Terms: R478 pm x 12*

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The Verilog language provides a means to model a digital system at many levels of abstraction from a logic gate to a complex digital system to a mainframe computer. The purpose of this book is to present the Verilog language together with a wide variety of examples, so that the reader can gain a firm foundation in the design of the digital system using Verilog HDL. The Verilog projects include the design module, the test bench module, and the outputs obtained from the simulator that illustrate the complete functional operation of the design. Where applicable, a detailed review of the theory of the topic is presented together with the logic design principles-including: state diagrams, Karnaugh maps, equations, and the logic diagram. Numerous examples and homework problems are included throughout. The examples include logical operations, counters of different moduli, half adders, full adders, a carry lookahead adder, array multipliers, different types of Moore and Mealy machines, and arithmetic logic units (ALUs).

General

Imprint: Crc Press
Country of origin: United Kingdom
Release date: October 2017
First published: 2018
Authors: Joseph Cavanagh
Dimensions: 254 x 178 x 44mm (L x W x T)
Format: Hardcover
Pages: 674
ISBN-13: 978-1-138-09995-1
Categories: Books > Professional & Technical > Environmental engineering & technology > General
Books > Computing & IT > General theory of computing > General
Books > Computing & IT > Applications of computing > General
Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
LSN: 1-138-09995-3
Barcode: 9781138099951

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