This book presents hardware-efficient algorithms and FPGA
implementations for two robotic tasks, namely exploration and
landmark determination. The work identifies scenarios for mobile
robotics where parallel processing and selective shutdown offered
by FPGAs are invaluable. The book proceeds to systematically
develop memory-driven VLSI architectures for both the tasks. The
architectures are ported to a low-cost FPGA with a fairly small
number of system gates.
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