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Hardware Design and Simulation in VAL/VHDL (Paperback, Softcover reprint of the original 1st ed. 1991)
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Hardware Design and Simulation in VAL/VHDL (Paperback, Softcover reprint of the original 1st ed. 1991)
Series: The Springer International Series in Engineering and Computer Science, 112
Expected to ship within 10 - 15 working days
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The VHSIC Hardware Description Language (VHDL) provides a standard
machine processable notation for describing hardware. VHDL is the
result of a collaborative effort between IBM, Intermetrics, and
Texas Instruments; sponsored by the Very High Speed Integrated Cir
cuits (VHSIC) program office of the Department of Defense,
beginning in 1981. Today it is an IEEE standard (1076-1987), and
several simulators and other automated support tools for it are
available commercially. By providing a standard notation for
describing hardware, especially in the early stages of the hardware
design process, VHDL is expected to reduce both the time lag and
the cost involved in building new systems and upgrading existing
ones. VHDL is the result of an evolutionary approach to language
devel opment starting with high level hardware description
languages existing in 1981. It has a decidedly programming language
flavor, resulting both from the orientation of hardware languages
of that time, and from a ma jor requirement that VHDL use Ada
constructs wherever appropriate. During the 1980's there has been
an increasing current of research into high level specification
languages for systems, particularly in the software area, and new
methods of utilizing specifications in systems de velopment. This
activity is worldwide and includes, for example, object oriented
design, various rigorous development methods, mathematical
verification, and synthesis from high level specifications. VAL
(VHDL Annotation Language) is a simple further step in the
evolution of hardware description languages in the direction of
applying new methods that have developed since VHDL was designed."
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