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Books > Science & Mathematics > Physics > Classical mechanics > Sound, vibration & waves (acoustics)
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Digit-Serial Computation (Hardcover, 1995 ed.)
Loot Price: R5,761
Discovery Miles 57 610
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Digit-Serial Computation (Hardcover, 1995 ed.)
Series: The Springer International Series in Engineering and Computer Science, 316
Expected to ship within 10 - 15 working days
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Digital signal processing (DSP) is used in a wide range of
applications such as speech, telephone, mobile radio, video, radar
and sonar. The sample rate requirements of these applications range
from 10 KHz to 100 MHz. Real time implementation of these systems
requires design of hardware which can process signal samples as
these are received from the source, as opposed to storing them in
buffers and processing them in batch mode. Efficient implementation
of real time hardware for DSP applications requires study of
families of architectures and implementation styles out of which an
appropriate architecture can be selected for a specified
application. To this end, the digit-serial implementation style is
proposed as an appropriate design methodology for cases where
bit-serial systems cannot meet the sample rate requirements, and
bit-parallel systems require excessive hardware. The number of bits
processed in a clock cycle is referred to as the digit-size. The
hardware complexity and the achievable sample rate increase with
increase in the digit-size. As special cases, a digit serial system
is reduced to bit-serial or bit-parallel when the digit-size is
selected to equal one or the word-length, respectively. A family of
implementations can be obtained by changing the digit-size
parameter, thus permitting an optimal trade-off between throughput
and size. Because of their structured architecture, digit-serial
designs lend themselves to automatic compilation from algorithmic
descriptions. An implementation of this design methodology, the
Parsifal silicon compiler was developed at the General Electric
Corporate Research and Development laboratory."
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