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Coupled Data Communication Techniques for High-Performance and Low-Power Computing (Paperback, 2010 ed.)
Loot Price: R4,228
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Coupled Data Communication Techniques for High-Performance and Low-Power Computing (Paperback, 2010 ed.)
Series: Integrated Circuits and Systems
Expected to ship within 10 - 15 working days
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Wafer-scale integration has long been the dream of system
designers. Instead of chopping a wafer into a few hundred or a few
thousand chips, one would just connect the circuits on the entire
wafer. What an enormous capability wafer-scale integration would
offer: all those millions of circuits connected by high-speed
on-chip wires. Unfortunately, the best known optical systems can
provide suitably ?ne resolution only over an area much smaller than
a whole wafer. There is no known way to pattern a whole wafer with
transistors and wires small enough for modern circuits. Statistical
defects present a ?rmer barrier to wafer-scale integration. Flaws
appear regularly in integrated circuits; the larger the circuit
area, the more probable there is a ?aw. If such ?aws were the
result only of dust one might reduce their numbers, but ?aws are
also the inevitable result of small scale. Each feature on a modern
integrated circuit is carved out by only a small number of photons
in the lithographic process. Each transistor gets its electrical
properties from only a small number of impurity atoms in its tiny
area. Inevitably, the quantized nature of light and the atomic
nature of matter produce statistical variations in both the number
of photons de?ning each tiny shape and the number of atoms
providing the electrical behavior of tiny transistors. No known way
exists to eliminate such statistical variation, nor may any be
possible.
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