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Synthesis Techniques and Optimizations for Reconfigurable Systems (Paperback, Softcover reprint of hardcover 1st ed. 2004)
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Synthesis Techniques and Optimizations for Reconfigurable Systems (Paperback, Softcover reprint of hardcover 1st ed. 2004)
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Synthesis Techniques and Optimization for Reconfigurable Systems
discusses methods used to model reconfigurable applications at the
system level, many of which could be incorporated directly into
modern compilers. The book also discusses a framework for
reconfigurable system synthesis, which bridges the gap between
application-level compiler analysis and high-level device
synthesis. The development of this framework (discussed in Chapter
5), and the creation of application analysis which further optimize
its output (discussed in Chapters 7, 8, and 9), represent over four
years of rigorous investigation within UCLA's Embedded and
Reconfigurable Laboratory (ERLab) and UCSB's Extensible,
Programmable and Reconfigirable Embedded SystemS (ExPRESS) Group.
The research of these systems has not yet matured, and we
continually strive to develop data and methods, which will extend
the collective understanding of reconfigurable system synthesis.
Synthesis Techniques and Optimization for Reconfigurable Systems
assumes a basic understanding of logic design, hardware synthesis
(from high-level architecture generation down to placement and
routing), and the structure and form of high-level application
constructs (such as loops and branches). However, this book may be
read and used in the absence of such background knowledge. This
text is aimed at researchers and system-level designers (both
academic and industrial), but could easily be used as the text of
graduate-level course on reconfigurable system synthesis
techniques.
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