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Books > Professional & Technical > Energy technology & engineering > Electrical engineering
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Design Automation for Timing-Driven Layout Synthesis (Paperback, Softcover reprint of the original 1st ed. 1993)
Loot Price: R4,012
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Design Automation for Timing-Driven Layout Synthesis (Paperback, Softcover reprint of the original 1st ed. 1993)
Series: The Springer International Series in Engineering and Computer Science, 198
Expected to ship within 18 - 22 working days
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The automation of layout synthesis design under stringent timing
specifications is essential for state-of-the-art VLSI circuits and
systems design. Especially, the timing-driven layout synthesis with
optimal placement and routing of transistors with proper sizing is
most critical in view of the chip area, interconnection parasitics,
circuit delay and power dissipation. This book presents a
systematic and unified view of the layout synthesis problem with a
strong focus on CMOS technology. The criticality of RC parasitics
in the interconnects and the optimal sizing of both p-channel and
n-channel translators are illustrated for motivation. Following the
motivation, the problems of modeling circuit delays and translator
sizing are formulated and solved with mathematical rigor. Various
delay models for CMOS circuits are discussed to account for
realistic interconnection parasitics, the effect of transistor
sizes, and also the input slew rates. Also many of the efficient
transistor sizing algorithms are critically reviewed and the most
recent transistor sizing algorithm based on convex programming
techniques is introduced.For design automation of the rigorous CMOS
layout synthesis, an integrated system that employs a suite of
functional modules is introduced for step-by-step illustration of
the design optimization process that produces highly compact CMOS
layouts that meet user-specified timing and logical netlist
requirements. Through most rigorous discussion of the essential
design automation process steps and important models and algorithms
this book presents a unified systems approach that can be practiced
for high-performance CMOS VLSI designs. This book serves as an
excellent reference, and can be used as text in advanced courses
covering VLSI design, especially for design automation of physical
design.
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