0
Your cart

Your cart is empty

Books > Professional & Technical > Energy technology & engineering > Electrical engineering

Buy Now

Test Resource Partitioning for System-on-a-Chip (Paperback, Softcover reprint of the original 1st ed. 2002) Loot Price: R2,860
Discovery Miles 28 600
Test Resource Partitioning for System-on-a-Chip (Paperback, Softcover reprint of the original 1st ed. 2002): Vikram Iyengar,...

Test Resource Partitioning for System-on-a-Chip (Paperback, Softcover reprint of the original 1st ed. 2002)

Vikram Iyengar, Anshuman Chandra

Series: Frontiers in Electronic Testing, 20

 (sign in to rate)
Loot Price R2,860 Discovery Miles 28 600 | Repayment Terms: R268 pm x 12*

Bookmark and Share

Expected to ship within 10 - 15 working days

Test Resource Partitioning for System-on-a-Chip is about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. Plug-and-play refers to the paradigm in which core-to-core interfaces as well as core-to-SOC logic interfaces are standardized, such that cores can be easily plugged into "virtual sockets" on the SOC design, and core tests can be plugged into the SOC during test without substantial effort on the part of the system integrator. The goal of the book is to position test resource partitioning in the context of SOC test automation, as well as to generate interest and motivate research on this important topic. SOC integrated circuits composed of embedded cores are now commonplace. Nevertheless, There remain several roadblocks to rapid and efficient system integration. Test development is seen as a major bottleneck in SOC design, and test challenges are a major contributor to the widening gap between design capability and manufacturing capacity. Testing SOCs is especially challenging in the absence of standardized test structures, test automation tools, and test protocols. Test Resource Partitioning for System-on-a-Chip responds to a pressing need for a structured methodology for SOC test automation. It presents new techniques for the partitioning and optimization of the three major SOC test resources: test hardware, testing time and test data volume. Test Resource Partitioning for System-on-a-Chip paves the way for a powerful integrated framework to automate the test flow for a large number of cores in an SOC in a plug-and-play fashion. The framework presented allows the system integrator to reduce test cost and meet short time-to-market requirements.

General

Imprint: Springer-Verlag New York
Country of origin: United States
Series: Frontiers in Electronic Testing, 20
Release date: June 2002
First published: November 2012
Authors: Vikram Iyengar • Anshuman Chandra
Dimensions: 235 x 155 x 13mm (L x W x T)
Format: Paperback
Pages: 232
Edition: Softcover reprint of the original 1st ed. 2002
ISBN-13: 978-1-4613-5400-0
Categories: Books > Professional & Technical > Technology: general issues > Technical design > Computer aided design (CAD)
Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
Promotions
LSN: 1-4613-5400-5
Barcode: 9781461354000

Is the information for this product incomplete, wrong or inappropriate? Let us know about it.

Does this product have an incorrect or missing image? Send us a new image.

Is this product missing categories? Add more categories.

Review This Product

No reviews yet - be the first to create one!

You might also like..

Power System Analysis and Design, SI…
J. Duncan Glover, Mulukutla Sarma, … Paperback R1,396 R1,223 Discovery Miles 12 230
Eskom - Power, Politics And The (Post…
Faeeza Ballim Paperback R320 R288 Discovery Miles 2 880
Hybrid-Renewable Energy Systems in…
Hina Fathima, Prabaharan N, … Paperback R4,778 R4,431 Discovery Miles 44 310
Smart Sensors and MEMS - Intelligent…
S. Nihtianov, A. Luque Paperback R6,688 R6,173 Discovery Miles 61 730
Ultra-Supercritical Coal Power Plants…
Dongke Zhang Ftse Hardcover R4,332 R4,026 Discovery Miles 40 260
Biomass Combustion Science, Technology…
Lasse Rosendahl Hardcover R4,656 Discovery Miles 46 560
Combined Cycle Systems for Near-Zero…
Ashok D Rao Hardcover R4,477 Discovery Miles 44 770
High Temperature Superconductors (HTS…
Ziad Melhem Hardcover R4,774 Discovery Miles 47 740
Power Plant Life Management and…
John E. Oakey Hardcover R6,060 Discovery Miles 60 600
Microgeneration - Low energy strategies…
Dave Parker Paperback R982 Discovery Miles 9 820
Practical Grounding, Bonding, Shielding…
G. Vijayaraghavan, Mark Brown, … Paperback R1,513 Discovery Miles 15 130
Power Electronic Control in Electrical…
Enrique Acha, Vassilios Agelidis, … Hardcover R3,295 Discovery Miles 32 950

See more

Partners