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Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters (Hardcover, 1999 ed.)
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Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters (Hardcover, 1999 ed.)
Series: The Springer International Series in Engineering and Computer Science, 493
Expected to ship within 10 - 15 working days
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Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters
investigates the feasibility of designing Delta-Sigma Analog to
Digital Converters for very low supply voltage (lower than 1.5V)
and low power operation in standard CMOS processes. The chosen
technique of implementation is the Switched Opamp Technique which
provides Switched Capacitor operation at low supply voltage without
the need to apply voltage multipliers or low VtMOST devices. A
method of implementing the classic single loop and cascaded
Delta-Sigma modulator topologies with half delay integrators is
presented. Those topologies are studied in order to find the
parameters that maximise the performance in terms of peak SNR.
Based on a linear model, the performance degradations of higher
order single loop and cascaded modulators, compared to a
hypothetical ideal modulator, are quantified. An overview of low
voltage Switched Capacitor design techniques, such as the use of
voltage multipliers, low VtMOST devices and the Switched Opamp
Technique, is given. An in-depth discussion of the present status
of the Switched Opamp Technique covers the single-ended Original
Switched Opamp Technique, the Modified Switched Opamp Technique,
which allows lower supply voltage operation, and differential
implementation including common mode control techniques. The
restrictions imposed on the analog circuits by low supply voltage
operation are investigated. Several low voltage circuit building
blocks, some of which are new, are discussed. A new low voltage
class AB OTA, especially suited for differential Switched Opamp
applications, together with a common mode feedback amplifier and a
comparator are presented and analyzed. As part of asystematic
top-down design approach, the non-ideal charge transfer of the
Switched Opamp integrator cell is modeled, based upon several
models of the main opamp non-ideal characteristics. Behavioral
simulations carried out with these models yield the required opamp
specifications that ensure that the intended performance is met in
an implementation. A power consumption analysis is performed. The
influence of all design parameters, especially the low power supply
voltage, is highlighted. Design guidelines towards low power
operation are distilled. Two implementations are presented together
with measurement results. The first one is a single-ended
implementation of a Delta-Sigma ADC operating with 1.5V supply
voltage and consuming 100 &mgr;W for a 74 dB dynamic range in a
3.4 kHz bandwidth. The second implementation is differential and
operates with 900 mV. It achieves 77 dB dynamic range in 16 kHz
bandwidth and consumes 40 &mgr;W. Design of Low-Voltage
Low-Power CMOS Delta-Sigma A/D Converters is essential reading for
analog design engineers and researchers.
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