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This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the “smart data converters” concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (obtained from devices, signals, applications or the ambient situations, etc.) for circuit and architecture optimization during the design phase or adaptation during operation, to enhance data converters performance, flexibility, robustness and power-efficiency. The authors focus on exploiting the a-priori knowledge of the system/application to develop enhancement techniques for ADCs, with particular emphasis on improving the power efficiency of high-speed and high-resolution ADCs for broadband multi-carrier systems.
This book describes a unique approach to smart receiver system design. It starts with the analysis of a very basic, single-path receiver structure, then using similar methods, extends the analysis to a more complicated multi-path receiver. Within the multi-path structure, two different types of phased -array architectures are discussed: Analog beam-forming, and digital beam-forming. The pros and cons are studied, and the gaps are identified. Whereas previous books in this area focus mainly on phased-array circuit implementations, this book fills a gap by providing a system-level approach and introduces new methods for developing smart systems.
This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the "smart data converters" concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (obtained from devices, signals, applications or the ambient situations, etc.) for circuit and architecture optimization during the design phase or adaptation during operation, to enhance data converters performance, flexibility, robustness and power-efficiency. The authors focus on exploiting the a-priori knowledge of the system/application to develop enhancement techniques for ADCs, with particular emphasis on improving the power efficiency of high-speed and high-resolution ADCs for broadband multi-carrier systems.
The RF front-end - antenna combination is a vital part of a mobile phone because its performance is very relevant to the link quality between hand-set and cellular network base-stations. The RF front-end performance suffers from changes in operating environment, like hand-effects, that are often unpredictable. Adaptive RF Front-Ends for Hand-Held Applications presents an analysis on the impact of fluctuating environmental parameters. In order to overcome undesired behavior two different adaptive control methods are treated that make RF frond-ends more resilient: adaptive impedance control, and adaptive power control. Several adaptive impedance control techniques are discussed, using a priori knowledge on matching network properties, in order to simplify robust 2-dimensional control. A generic protection concept is presented, based on adaptive power control, which improves the ruggedness of a power amplifier or preserves its linearity under extremes. It comprises over-voltage, over-temperature, and under-voltage protection.
Analog Circuit Design contains the contribution of 18 tutorials of the 19th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of: Robust Design, chaired by Herman Casier, Consultant Sigma Delta Converters, chaired by Prof. Michiel Steyaert, Catholic University Leuven RFID, chaired by Prof. Arthur van Roermund, Eindhoven University of Technology Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design course.
Analog Circuit Design contains the contribution of 18 tutorials of the 18th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 18 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of: Smart Data Converters: Chaired by Prof. Arthur van Roermund, Eindhoven University of Technology, Filters on Chip: Chaired by Herman Casier, AMI Semiconductor Fellow, Multimode Transmitters: Chaired by Prof. M. Steyaert, Catholic University Leuven, Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design.
Abstract This chapter lays the foundation for the work presented in latter chapters. The potential of 60 GHz frequency bands for high data rate wireless transfer is discussed and promising applications are enlisted. Furthermore, the challenges related to 60 GHz IC design are presented and the chapter concludes with an outline of the book. Keywords Wireless communication 60 GHz Millimeter wave integrated circuit design Phase-locked loop CMOS Communication technology has revolutionized our way of living over the last century. Since Marconi's transatlantic wireless experiment in 1901, there has been tremendous growth in wireless communication evolving from spark-gap telegraphy to today's mobile phones equipped with Internet access and multimedia capabilities. The omnipresence of wireless communication can be observed in widespread use of cellular telephony, short-range communication through wireless local area networks and personal area networks, wireless sensors and many others. The frequency spectrum from 1 to 6 GHz accommodates the vast majority of current wireless standards and applications. Coupled with the availability of low cost radio frequency (RF) components and mature integrated circuit (IC) techn- ogies, rapid expansion and implementation of these systems is witnessed. The downside of this expansion is the resulting scarcity of available bandwidth and allowable transmit powers. In addition, stringent limitations on spectrum and energy emissions have been enforced by regulatory bodies to avoid interference between different wireless systems.
This book describes innovative techniques and the theoretical background for design and analysis of high performance RF/Microwave transmitters. It introduces new, robust linearization/efficiency enhancement techniques, applicable to all of the switched mode power amplifiers. Novel analysis methods associated with these new techniques are also introduced and supporting measurement results are documented. Innovative graphical representation methods are used to help the reader understand the matter intuitively. Applications for the techniques discussed are very extensive, ranging from data convertors to RF/Microwave/mm-wave wireless/wire line transmitters. The authors have avoided using lengthy formulas in the discussion and have used an intuitive and simple approach to go through the necessary details. Readers will gain valuable understanding of the dither phenomenon, its mechanism, effect and undesired side effects. The novel architectures introduced are simple, don't require complicated DSP techniques and are easy to implement.
Sigma Delta converters are a very popular choice for the A/D converter in multi-standard, mobile and cellular receivers. Key A/D converter specifications are high dynamic range, robustness, scalability, low-power and low EMI. "Robust Sigma Delta Converters "presents a requirement derivation of a Sigma Delta modulator applied in a receiver for cellular and connectivity, and shows trade-offs between RF and ADC. The book proposes to categorize these requirements in 5 quality indicators which can be used to qualify a system, namely accuracy, robustness, flexibility, efficiency and emission. In the book these quality indicators are used to categorize Sigma Delta converter theory. A few highlights on each of these quality indicators are; Quality indicators: provide a means to quantify system quality.Accuracy: introduction of new Sigma Delta Modulator architectures.Robustness: a significant extension on clock jitter theory based on phase and error amplitude error models. Extension of the theory describing aliasing in Sigma Delta converters for different types of DACs in the feedback loop. Flexibility: introduction of a Sigma Delta converter bandwidth scaling theory leading to very flexible Sigma Delta converters. Efficiency: introduction of new Figure-of-Merits which better reflect performance-power trade-offs. Emission: analysis of Sigma Delta modulators on emission is not part of the book The quality indicators also reveal that, to exploit nowadays advanced IC technologies, things should be done as much as possible digital up to a limit where system optimization allows reducing system margins. At the end of the book Sigma Delta converter implementations are shown which are digitized on application-, architecture-, circuit- and layout-level. "Robust Sigma Delta Converters "is written under the assumption that the reader has some background in receivers and in A/D conversion.
"Integrated 60GHz RF Beamforming in CMOS "describes new concepts and design techniques that can be used for 60GHz phased array systems. First, general trends and challenges in low-cost high data-rate 60GHz wireless system are studied, and the phased array technique is introduced to improve the system performance. Second, the system requirements of phase shifters are analyzed, and different phased array architectures are compared. Third, the design and implementation of 60GHz passive and active phase shifters in a CMOS technology are presented. Fourth, the integration of 60GHz phase shifters with other key building blocks such as low noise amplifiers and power amplifiers are described in detail. Finally, this book describes the integration of a 60GHz CMOS amplifier and an antenna in a printed circuit-board (PCB) package.
Smart and Flexible Digital-to-Analog Converters proposes new concepts and implementations for flexibility and self-correction of current-steering digital-to-analog converters (DACs) which allow the attainment of a wide range of functional and performance specifications, with a much reduced dependence on the fabrication process. DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.< DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.
Log-domain and translinear filters provide a competitive alternative to the challenges of ever increasing low-voltage, low-power and high frequency demands in the area of continuous-time filters. Since translinear filters are fundamentally large-signal linear, they are capable of realizing a large dynamic range in combination with excellent tunability characteristics. Large-signal linearity is achieved by exploiting the accurate exponential behavior of the bipolar transistor or the subthreshold MOS transistor. A generalization of the dynamic translinear principle exploiting the square law behavior of the MOS transistor is theoretically possible, but not practically relevant. Translinear and log-domain filters are based on the dynamic translinear principle, a generalization of the conventional (static) translinear principle. Besides their application for linear filters, dynamic translinear circuits can also be used for the realization of non-linear dynamic functions, such as oscillators, RMS-DC converters and phase-locked loops. Dynamic Translinear and Log-Domain Circuits: Analysis and Synthesis covers both the analysis and synthesis of translinear circuits. The theory is presented using one unifying framework for both static and dynamic translinear networks, which is based on a current-mode approach. General analysis methods are presented, including the large-signal and non-stationary analysis of noise. A well-structured synthesis method is described greatly enhancing the designability of log-domain and translinear circuits. Comparisons are made with respect to alternative analysis and synthesis methods presented in the literature. The theory is illustrated and verified by various examples and realizations. Dynamic Translinear and Log-Domain Circuits: Analysis and Synthesis is an excellent reference for researchers and circuit designers, and may be used as a text for advanced courses on the topic.
The history of the application of semiconductors for controlling currents goes back all the way to 1926, in which Julius Lilienfeld led a patent for a "Method and apparatus for controlling electric currents" [1], which is considered the rst work on metal/semiconductor eld-effect transistors. More well-known is the work of William Shockley, John Bardeen and Walter Brattain in the 1940s [2, 3], after which the development of semiconductor devices commenced. In 1958, independent work from Jack Kilby and Robert Noyce ledto the invention of integrated circuits. A few milestones in IC design are the rst monolithic operational ampli er in 1963 (Fairchild?A702, Bob Widlar) and the rst o- chip 4-bit microprocessor in 1971 (Intel 4004). Ever since the start of the semiconductor history, integration plays an imp- tant role: starting from single devices, ICs with basic functions were developed (e. g. opamps, logic gates), followed by ICs that integrate larger parts of a s- tem (e. g. microprocessors, radio tuners, audio ampli ers). Following this trend of system integration, this eventually leads to the integration of analog and d- ital components in one chip, resulting in mixed-signal ICs: digital components are required because signal processing is preferably done in the digital - main; analog components are required because physical signals are analog by nature. Mixed-signal ICs are already widespread in many applications (e. g. - dio, video); for the future, it is expected that this trend will continue, leading to a larger scale of integration.
This book describes innovative techniques and the theoretical background for design and analysis of high performance RF/Microwave transmitters. It introduces new, robust linearization/efficiency enhancement techniques, applicable to all of the switched mode power amplifiers. Novel analysis methods associated with these new techniques are also introduced and supporting measurement results are documented. Innovative graphical representation methods are used to help the reader understand the matter intuitively. Applications for the techniques discussed are very extensive, ranging from data convertors to RF/Microwave/mm-wave wireless/wire line transmitters. The authors have avoided using lengthy formulas in the discussion and have used an intuitive and simple approach to go through the necessary details. Readers will gain valuable understanding of the dither phenomenon, its mechanism, effect and undesired side effects. The novel architectures introduced are simple, don't require complicated DSP techniques and are easy to implement.
This book describes a unique approach to smart receiver system design. It starts with the analysis of a very basic, single-path receiver structure, then using similar methods, extends the analysis to a more complicated multi-path receiver. Within the multi-path structure, two different types of phased -array architectures are discussed: Analog beam-forming, and digital beam-forming. The pros and cons are studied, and the gaps are identified. Whereas previous books in this area focus mainly on phased-array circuit implementations, this book fills a gap by providing a system-level approach and introduces new methods for developing smart systems.
The strong interaction between the demand for increasing chip functionality and data-processing speeds, and technological trends in the integrated circuit industry, like e.g. shrinking device geometry, growing chip area and increased transistor switching speeds, cause a huge increase in power dissipation for deep sub-micron digital CMOS circuits. Low-Power Deep Sub-micron CMOS Logic, Sub-threshold Current Reduction classifies all power dissipation sources in digital CMOS circuits and provides for a systematic approach of power reduction techniques. A clear distinction has been made between power dissipated to perform a calculation in a certain time frame, i.e. functional power dissipation, and power dissipated even when a circuit is idle, i.e. parasitical power dissipation. The threshold voltage level forms an important link between the functional and the parasitical power dissipation. Since for high data-processing speeds the threshold voltage needs to be low, whereas for low sub-threshold leakage currents it needs to be high. The latter is extremely important for battery operated circuits in standby modes.Therefore, a separate classification of sub-threshold current reduction techniques is presented showing existing and new circuit topologies. Low-Power Deep Sub-micron CMOS Logic, Sub-threshold Current Reduction is a valuable book for researchers, designers as well as students in the field of low-power digital design. Power dissipation is discussed from a fundamental, quantum mechanical and a practical point of view. Theory is accompanied with practical circuit implementations and measurement results.
Mixed-Signal Layout Generation Concepts covers important
physical-design issues that exist in contemporary analog and
mixed-signal design flows. Due to the increasing pressure on
time-to-market, the steep increase in chip fabrication costs, and
the increasing design complexity, it becomes even more challenging
to produce a first-time right IC layout. The fundamental issues in
creating a layout are placement and routing. Although these coupled
problems have been investigated for many decades, no satisfactory
automated solution has emerged yet. Fortunately, supported by
modern computing power and results of new research that further
improve computation efficiency, significant steps forward have been
taken.
Sigma Delta converters are a very popular choice for the A/D converter in multi-standard, mobile and cellular receivers. Key A/D converter specifications are high dynamic range, robustness, scalability, low-power and low EMI. "Robust Sigma Delta Converters "presents a requirement derivation of a Sigma Delta modulator applied in a receiver for cellular and connectivity, and shows trade-offs between RF and ADC. The book proposes to categorize these requirements in 5 quality indicators which can be used to qualify a system, namely accuracy, robustness, flexibility, efficiency and emission. In the book these quality indicators are used to categorize Sigma Delta converter theory. A few highlights on each of these quality indicators are; Quality indicators: provide a means to quantify system quality.Accuracy: introduction of new Sigma Delta Modulator architectures.Robustness: a significant extension on clock jitter theory based on phase and error amplitude error models. Extension of the theory describing aliasing in Sigma Delta converters for different types of DACs in the feedback loop. Flexibility: introduction of a Sigma Delta converter bandwidth scaling theory leading to very flexible Sigma Delta converters. Efficiency: introduction of new Figure-of-Merits which better reflect performance-power trade-offs. Emission: analysis of Sigma Delta modulators on emission is not part of the book The quality indicators also reveal that, to exploit nowadays advanced IC technologies, things should be done as much as possible digital up to a limit where system optimization allows reducing system margins. At the end of the book Sigma Delta converter implementations are shown which are digitized on application-, architecture-, circuit- and layout-level. "Robust Sigma Delta Converters "is written under the assumption that the reader has some background in receivers and in A/D conversion.
"Integrated 60GHz RF Beamforming in CMOS "describes new concepts and design techniques that can be used for 60GHz phased array systems. First, general trends and challenges in low-cost high data-rate 60GHz wireless system are studied, and the phased array technique is introduced to improve the system performance. Second, the system requirements of phase shifters are analyzed, and different phased array architectures are compared. Third, the design and implementation of 60GHz passive and active phase shifters in a CMOS technology are presented. Fourth, the integration of 60GHz phase shifters with other key building blocks such as low noise amplifiers and power amplifiers are described in detail. Finally, this book describes the integration of a 60GHz CMOS amplifier and an antenna in a printed circuit-board (PCB) package.
Smart and Flexible Digital-to-Analog Converters proposes new concepts and implementations for flexibility and self-correction of current-steering digital-to-analog converters (DACs) which allow the attainment of a wide range of functional and performance specifications, with a much reduced dependence on the fabrication process. DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.< DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.
Analog Circuit Design contains the contribution of 18 tutorials of
the 11th Workshop on Advances in Analog Circuit Design. This book
is number 11 in this successful series of Analog Circuit Design,
providing valuable information and excellent overviews of analog
circuit design, CAD, and RF systems. These books can be seen as a
reference to those people involved in analog and mixed signal
design.
Wireless sensor networks have the potential to become the third wireless revolution after wireless voice networks in the 80s and wireless data networks in the late 90s. Unfortunately, radio power consumption is still a major bottleneck to the wide adoption of this technology. Different directions have been explored to minimize the radio consumption, but the major drawback of the proposed solutions is a reduced wireless link robustness. The primary goal of Architectures and Synthesizers for Ultra-low Power Fast Frequency-Hopping WSN Radios is to discuss, in detail, existing and new architectural and circuit level solutions for ultra-low power, robust, uni-directional and bi-directional radio links. Architectures and Synthesizers for Ultra-low Power Fast Frequency-Hopping WSN Radios guides the reader through the many system, circuit and technology trade-offs he will be facing in the design of communication systems for wireless sensor networks. Finally, this book, through different examples realized in both advanced CMOS and bipolar technologies opens a new path in the radio design, showing how radio link robustness can be guaranteed by techniques that were previously exclusively used in radio systems for middle or high end applications like Bluetooth and military communications while still minimizing the overall system power consumption.
Analog design still has, unfortunately, a flavor of art. Art can be beautiful. However, art in itself is difficult to teach to students and difficult to transfer from experienced analog designers to new trainee designers in companies. Structured Electronic Design: High-Performance Harmonic Oscillators and Bandgap References aims to systemize analog design. The use of orthogonalization of the design of the fundamental quality aspects (noise, distortion, and bandwidth) and hierarchy in the subsequent design steps, enables designers to achieve high-performance designs, in a relatively short time. As a result of the systematic design procedure, the effect of design decisions on the circuit performance is made clear. Additionally, the use of resources for reaching a specified performance is tracked. This book, therefore, describes the structured electronic design of high-performance harmonic oscillators and bandgap references. The structured design of harmonic oscillators includes the maximization of the carrier-to- noise ratio by means of tapping, i.e. an impedance adaption method for noise matching. The bandgap reference, a popular implementation of a voltage reference, is studied via the unusual concept of the linear combination of base-emitter voltages. The presented method leads to the design of high-performance references in CMOS and Bipolar technology. Using this concept, on a high level of abstraction the quality with respect to, for instance, noise and power-supply rejection can be identified. In this book, it is shown with several design examples that this method provides an excellent starting point for the design of high-performance bandgap references. Auxiliary to the harmonic-oscillator and bandgap reference design are the negative- feedback amplifiers. In this book the systematic design of the dynamic behavior is emphasized. By means of the identification of the dominant poles, it is possible to give an upper limit of the attainable bandwidth, even before the real frequency compensation is accomplished. Structured Electronic Design: High-Performance Harmonic Oscillators and Bandgap References is a valuable book for researchers and designers, as well as students in the field of analog design. It helps both the experienced and trainee designer to come to grips with the design of analog circuits. The presented method is illustrated by several well- described design examples.
Wide-bandwidth high dynamic range Digital to Analog Converters (D/A) are essential elements of modern systems, e.g. multi-carrier communication systems. Current Steering D/A converters offer the potential to achieve high dynamic range for wide frequency bandwidths, however, their performance at higher frequencies is usually limited by strong nonlinear behavior. This behavior is not well understood and impedes performance progress. Wide-Bandwidth High Dynamic Range D/A Converters presents a structured description of the operation principles and the nonlinear behavior of Current Steering D/A Converters, and shows ways to deal with it in the design phase. The book provides the reader a thorough understanding of error mechanisms at high frequencies. It explains their effects and shows their dependencies with parameters of the processed signal, the architecture, its circuit blocks and their implementations. A highlight of the book is the detailed treatment of timing errors caused by circuit imperfections due to process mismatch and clock interconnects. The book follows a unique approach, building an analysis and synthesis framework of concepts with a generic scope beyond the current steering architecture. The concepts are tested in practice with the design and measurements of a high performance 12b 500MSample/sec Current Steering Digital to Analog Converter realized in 0.18m m CMOS.
Today, wireless infrared transmission has entered our homes, offices, industry and health care, with applications in the field of remote control, telemetry, and local communication. This book is about the underlying technology. As it is an outgrowth of my Ph.D. thesis, the emphasis is on fundamental aspects rather than industrial aspects, like the standardization effort by the IrDA [7]. I guess that this is not a drawback, as, eventually, the laws of physics apply to all of us! As the applied radiation is not necessarily in the infrared, throughout the book we usually prefer the term optical transmission. As most equipment is battery-powered, the emphasis is on power optimiza tion of the optical transmission system. System parameters as well as environ mental parameters that determine the eventual transmission quality are iden tified, to facilitate well-reasoned system design. Many design rules, based on calculations, measurements and simulations are presented to help the designer push the performance close to the limits set by nature and the available tech nology. The first chapters introduce the subject and the present the scope of the book. Then, the basic transmission link is introduced in chapter 3, and strate gies to optimize its signal-to-noise ratio are discussed. Lighting flicker is identi fied as a possible source of interference. Then, receiver noise and bandwidth are discussed in chapter 4, mainly based on the material presented in [66], [67], [69]. |
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