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Showing 1 - 11 of 11 matches in All Departments
This book describes the state-of-the-art of technology and research on In-Memory Computing Hardware Accelerators for Data-Intensive Applications. The authors discuss how processing-centric computing has become insufficient to meet target requirements and how Memory-centric computing may be better suited for the needs of current applications. This reveals for readers how current and emerging memory technologies are causing a shift in the computing paradigm. The authors do deep-dive discussions on volatile and non-volatile memory technologies, covering their basic memory cell structures, operations, different computational memory designs and the challenges associated with them. Specific case studies and potential applications are provided along with their current status and commercial availability in the market.
This book describes power management integrated circuits (PMIC), for power converters and voltage regulators necessary for energy efficient and small form factor systems. The authors discuss state-of-the-art PMICs not only for battery powered wearable devices, but also energy harvesting-based devices. The circuits presented support voltage scaling to reduce the overall average power consumption of a wearable device, resulting in longer device operating time. The discussion includes many designs, control techniques and approaches to distribute efficiently the power among different blocks in the device. * Demonstrates for readers how to innovate in designing power management integrated circuits (PMIC) suitable for wearable devices, powered by either battery or harvesting energy; * Introduces a dual outputs switched capacitor, using a single voltage regulator to minimize the area overhead and discusses the effect of having more than two outputs on the area and power efficiency; * Introduces a novel clock-less digital LDO regulator that eliminates the use of the clocked comparator and serial shift register in the conventional design; * Presents experimental results of energy harvesting-based power management units (PMU), using different combinations of power converters and voltage regulators, providing a guide for designers to select the appropriate option based on device requirements.
This book provides readers with a single-source guide to fabricate, characterize and model memristor devices for sensing applications. The authors describe a correlated, physics-based model to simulate and predict the behavior of devices fabricated with different oxide materials, active layer thickness, and operating temperature. They discuss memristors from various perspectives, including working mechanisms, different synthesis methods, characterization procedures, and device employment in radiation sensing and security applications.
This book discusses the design and implementation of energy harvesting systems targeting wearable devices. The authors describe in detail the different energy harvesting sources that can be utilized for powering low-power devices in general, focusing on the best candidates for wearable applications. Coverage also includes state-of-the-art interface circuits, which can be used to accept energy from harvesters and deliver it to a device in the most efficient way. Finally, the authors present power management circuits for using multiple energy harvesting sources at the same time to power devices and to enhance efficiency of the system.
This book presents techniques necessary to predict cardiac arrhythmias, long before they occur, based on minimal ECG data. The authors describe the key information needed for automated ECG signal processing, including ECG signal pre-processing, feature extraction and classification. The adaptive and novel ECG processing techniques introduced in this book are highly effective and suitable for real-time implementation on ASICs.
This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.
This book describes an ECG processing architecture that guides biomedical SoC developers, from theory to implementation and testing. The authors provide complete coverage of the digital circuit implementation of an ultra-low power biomedical SoC, comprised of a detailed description of an ECG processor implemented and fabricated on chip. Coverage also includes the challenges and tradeoffs of designing ECG processors. Describes digital circuit architecture for implementing ECG processing algorithms on chip; Includes coverage of signal processing techniques for ECG processing; Features ultra-low power circuit design techniques; Enables design of ECG processing architectures and their respective on-chip implementation.
This book introduces power amplifier design in 22nm FDSOI CMOS dedicated towards 5G applications at 28 GHz and presents 4 state-of-the-art power amplifier designs. The authors discuss power amplifier performance metrics, design trade-offs, and presents different power amplifier classes utilizing efficiency enhancement techniques at 28 GHz. The book presents the design process from theory, simulation, layout, and finally measurement results.
This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.
This book describes power management integrated circuits (PMIC), for power converters and voltage regulators necessary for energy efficient and small form factor systems. The authors discuss state-of-the-art PMICs not only for battery powered wearable devices, but also energy harvesting-based devices. The circuits presented support voltage scaling to reduce the overall average power consumption of a wearable device, resulting in longer device operating time. The discussion includes many designs, control techniques and approaches to distribute efficiently the power among different blocks in the device. * Demonstrates for readers how to innovate in designing power management integrated circuits (PMIC) suitable for wearable devices, powered by either battery or harvesting energy; * Introduces a dual outputs switched capacitor, using a single voltage regulator to minimize the area overhead and discusses the effect of having more than two outputs on the area and power efficiency; * Introduces a novel clock-less digital LDO regulator that eliminates the use of the clocked comparator and serial shift register in the conventional design; * Presents experimental results of energy harvesting-based power management units (PMU), using different combinations of power converters and voltage regulators, providing a guide for designers to select the appropriate option based on device requirements.
This book describes an ECG processing architecture that guides biomedical SoC developers, from theory to implementation and testing. The authors provide complete coverage of the digital circuit implementation of an ultra-low power biomedical SoC, comprised of a detailed description of an ECG processor implemented and fabricated on chip. Coverage also includes the challenges and tradeoffs of designing ECG processors. Describes digital circuit architecture for implementing ECG processing algorithms on chip; Includes coverage of signal processing techniques for ECG processing; Features ultra-low power circuit design techniques; Enables design of ECG processing architectures and their respective on-chip implementation.
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