The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device design is quite complicated and involves many aspects, the device engineering is mostly to devise a "best" device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 size < 10 nm , for a 1Tb memory chip by the year 2020. New problems keep hindering the high-performance requirement. Well-known, but older, problems include hot carrier effects, short-channel effects, etc. A potential problem, which illustrates the need for quantum transport, is caused by impurity fluctuations.

The past three decades have been a period where useful current and voltage instabilities in solids have progressed from exciting research problems to a wide variety of commercially available devices. Materials and electronics research has led to devices such as the tunnel (Esaki) diode, transferred electron (Gunn) diode, avalanche diodes, real-space transfer devices, and the like. These structures have proven to be very important in the generation, amplification, switching, and processing of microwave signals up to frequencies exceeding 100 GHz. In this treatise we focus on a detailed theoretical understanding of devices of the kind that can be made unstable against circuit oscillations, large amplitude switching events, and in some cases, internal rearrangement of the electric field or current density distribution. The book is aimed at the semiconductor device physicist, engineer, and graduate student. A knowledge of solid state physics on an elementary or introductory level is assumed. Furthermore, we have geared the book to device engineers and physicists desirous of obtaining an understanding substantially deeper than that associated with a small signal equivalent circuit approach. We focus on both analytical and numerical treatment of specific device problems, concerning ourselves with the mechanism that determines the constitutive relation governing the device, the boundary conditions (contact effects), and the effect of the local circuit environment.

The papers contained in the volume represent lectures delivered as a 1983 NATO ASI, held at Urbino, Italy. The lecture series was designed to identify the key submicron and ultrasubmicron device physics, transport, materials and contact issues. Nonequilibrium transport, quantum transport, interfacial and size constraints issues were also highlighted. The ASI was supported by NATO and the European Research Office. H. L. Grubin D. K. Ferry C. Jacoboni v CONTENTS MODELLING OF SUB-MICRON DEVICES.................. .......... 1 E. Constant BOLTZMANN TRANSPORT EQUATION... ... ...... .................... 33 K. Hess TRANSPORT AND MATERIAL CONSIDERATIONS FOR SUBMICRON DEVICES. . .. . . . . .. . . . .. . .. . .... ... .. . . . .. . . . .. . . . . . . . . . . 45 H. L. Grubin EPITAXIAL GROWTH FOR SUB MICRON STRUCTURES.................. 179 C. E. C. Wood INSULATOR/SEMICONDUCTOR INTERFACES.......................... 195 C. W. Wilms en THEORY OF THE ELECTRONIC STRUCTURE OF SEMICONDUCTOR SURFACES AND INTERFACES......................................... 223 C. Calandra DEEP LEVELS AT COMPOUND-SEMICONDUCTOR INTERFACES........... 253 W. Monch ENSEMBLE MONTE CARLO TECHNIqUES............................. 289 C. Jacoboni NOISE AND DIFFUSION IN SUBMICRON STRUCTURES................. 323 L. Reggiani SUPERLATTICES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361 . . . . . . . . . . . . K. Hess SUBMICRON LITHOGRAPHY 373 C. D. W. Wilkinson and S. P. Beaumont QUANTUM EFFECTS IN DEVICE STRUCTURES DUE TO SUBMICRON CONFINEMENT IN ONE DIMENSION.... ....................... 401 B. D. McCombe vii viii CONTENTS PHYSICS OF HETEROSTRUCTURES AND HETEROSTRUCTURE DEVICES..... 445 P. J. Price CORRELATION EFFECTS IN SHORT TIME, NONS TAT I ONARY TRANSPORT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477 . . . . . . . . . . . . J. J. Niez DEVICE-DEVICE INTERACTIONS............ ...................... 503 D. K. Ferry QUANTUM TRANSPORT AND THE WIGNER FUNCTION................... 521 G. J. Iafrate FAR INFRARED MEASUREMENTS OF VELOCITY OVERSHOOT AND HOT ELECTRON DYNAMICS IN SEMICONDUCTOR DEVICES............. 577 S. J. Allen, Jr.

The past three decades have been a period where useful current and voltage instabilities in solids have progressed from exciting research problems to a wide variety of commercially available devices. Materials and electronics research has led to devices such as the tunnel (Esaki) diode, transferred electron (Gunn) diode, avalanche diodes, real-space transfer devices, and the like. These structures have proven to be very important in the generation, amplification, switching, and processing of microwave signals up to frequencies exceeding 100 GHz. In this treatise we focus on a detailed theoretical understanding of devices of the kind that can be made unstable against circuit oscillations, large amplitude switching events, and in some cases, internal rearrangement of the electric field or current density distribution. The book is aimed at the semiconductor device physicist, engineer, and graduate student. A knowledge of solid state physics on an elementary or introductory level is assumed. Furthermore, we have geared the book to device engineers and physicists desirous of obtaining an understanding substantially deeper than that associated with a small signal equivalent circuit approach. We focus on both analytical and numerical treatment of specific device problems, concerning ourselves with the mechanism that determines the constitutive relation governing the device, the boundary conditions (contact effects), and the effect of the local circuit environment.

The papers contained in the volume represent lectures delivered as a 1983 NATO ASI, held at Urbino, Italy. The lecture series was designed to identify the key submicron and ultrasubmicron device physics, transport, materials and contact issues. Nonequilibrium transport, quantum transport, interfacial and size constraints issues were also highlighted. The ASI was supported by NATO and the European Research Office. H. L. Grubin D. K. Ferry C. Jacoboni v CONTENTS MODELLING OF SUB-MICRON DEVICES.................. .......... 1 E. Constant BOLTZMANN TRANSPORT EQUATION... ... ...... .................... 33 K. Hess TRANSPORT AND MATERIAL CONSIDERATIONS FOR SUBMICRON DEVICES. . .. . . . . .. . . . .. . .. . .... ... .. . . . .. . . . .. . . . . . . . . . . 45 H. L. Grubin EPITAXIAL GROWTH FOR SUB MICRON STRUCTURES.................. 179 C. E. C. Wood INSULATOR/SEMICONDUCTOR INTERFACES.......................... 195 C. W. Wilms en THEORY OF THE ELECTRONIC STRUCTURE OF SEMICONDUCTOR SURFACES AND INTERFACES......................................... 223 C. Calandra DEEP LEVELS AT COMPOUND-SEMICONDUCTOR INTERFACES........... 253 W. Monch ENSEMBLE MONTE CARLO TECHNIqUES............................. 289 C. Jacoboni NOISE AND DIFFUSION IN SUBMICRON STRUCTURES................. 323 L. Reggiani SUPERLATTICES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361 . . . . . . . . . . . . K. Hess SUBMICRON LITHOGRAPHY 373 C. D. W. Wilkinson and S. P. Beaumont QUANTUM EFFECTS IN DEVICE STRUCTURES DUE TO SUBMICRON CONFINEMENT IN ONE DIMENSION.... ....................... 401 B. D. McCombe vii viii CONTENTS PHYSICS OF HETEROSTRUCTURES AND HETEROSTRUCTURE DEVICES..... 445 P. J. Price CORRELATION EFFECTS IN SHORT TIME, NONS TAT I ONARY TRANSPORT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477 . . . . . . . . . . . . J. J. Niez DEVICE-DEVICE INTERACTIONS............ ...................... 503 D. K. Ferry QUANTUM TRANSPORT AND THE WIGNER FUNCTION................... 521 G. J. Iafrate FAR INFRARED MEASUREMENTS OF VELOCITY OVERSHOOT AND HOT ELECTRON DYNAMICS IN SEMICONDUCTOR DEVICES............. 577 S. J. Allen, Jr.

The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device design is quite complicated and involves many aspects, the device engineering is mostly to devise a "best" device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 size < 10 nm , for a 1Tb memory chip by the year 2020. New problems keep hindering the high-performance requirement. Well-known, but older, problems include hot carrier effects, short-channel effects, etc. A potential problem, which illustrates the need for quantum transport, is caused by impurity fluctuations.

Research on electronic transport in ultra small dimensions has been highly stimulated by the sensational developments in silicon technology and very large scale integration. The papers in this volume, however, have been influenced to no lesser extent by the advent of molecular beam epitaxy and metal/organic chemical vapor deposition which has made possible the control of semiconductor boundaries on a quantum level. This new control of boundary condi tions in ultra small electronic research is the mathematical reason for a whole set of innovative ideas. For the first time in the history of semiconductors, it is possible to design device functions from physical considerations involving ngstom scale dimensions. At the time the meeting was held, July 1982, it was one of the first strong signals of the powerful developments in this area. During the meeting, important questions have been answered concerning ballistic transport, Monte Carlo simulations of high field transport and other developments pertinent to new device concepts and the understanding of small devices from physics to function. The committee members want to express their deep appreciation to the speakers who have made the meeting a success. The USER pro ject of DOD has been a vital stimulous and thanks go to the Army Research Office and the Office of Naval Research for financial sup port. Urbana, January 1984 K. Hess, Conference Chairman J. R. Brews L. R. Cooper, Ex Officio D. K. Ferry H. L. Grubin G. J. Iafrate M. I. Nathan A. F."