This book documents some of the most recent advances on the physical layer of the Internet of Things (IoT), including sensors, circuits, and systems. The application area selected for illustrating these advances is that of autonomous, wearable systems for real-time medical diagnosis. The book is unique in that it adopts a holistic view of such systems and includes not only the sensor and processing subsystems, but also the power, communication, and security subsystems. Particular attention is paid to the integration of these IoT subsystems as well as the prototyping platforms needed for achieving such integration. Other unique features include the discussion of energy-harvesting subsystems to achieve full energy autonomy and the consideration of hardware security as a requirement for the integrity of the IoT physical layer. One unifying thread of the various designs considered in this book is that they have all been fabricated and tested in an advanced, low-power CMOS process, namely GLOBALFOUNDRIES 65nm CMOS LPe.

This book explains for readers how 3D chip stacks promise to increase the level of on-chip integration, and to design new heterogeneous semiconductor devices that combine chips of different integration technologies (incl. sensors) in a single package of the smallest possible size. The authors focus on heterogeneous 3D integration, addressing some of the most important challenges in this emerging technology, including contactless, optics-based, and carbon-nanotube-based 3D integration, as well as signal-integrity and thermal management issues in copper-based 3D integration. Coverage also includes the 3D heterogeneous integration of power sources, photonic devices, and non-volatile memories based on new materials systems.

This book provides readers with an up-to-date account of the use of machine learning frameworks, methodologies, algorithms and techniques in the context of computer-aided design (CAD) for very-large-scale integrated circuits (VLSI). Coverage includes the various machine learning methods used in lithography, physical design, yield prediction, post-silicon performance analysis, reliability and failure analysis, power and thermal analysis, analog design, logic synthesis, verification, and neuromorphic design. Provides up-to-date information on machine learning in VLSI CAD for device modeling, layout verifications, yield prediction, post-silicon validation, and reliability; Discusses the use of machine learning techniques in the context of analog and digital synthesis; Demonstrates how to formulate VLSI CAD objectives as machine learning problems and provides a comprehensive treatment of their efficient solutions; Discusses the tradeoff between the cost of collecting data and prediction accuracy and provides a methodology for using prior data to reduce cost of data collection in the design, testing and validation of both analog and digital VLSI designs. From the Foreword As the semiconductor industry embraces the rising swell of cognitive systems and edge intelligence, this book could serve as a harbinger and example of the osmosis that will exist between our cognitive structures and methods, on the one hand, and the hardware architectures and technologies that will support them, on the other....As we transition from the computing era to the cognitive one, it behooves us to remember the success story of VLSI CAD and to earnestly seek the help of the invisible hand so that our future cognitive systems are used to design more powerful cognitive systems. This book is very much aligned with this on-going transition from computing to cognition, and it is with deep pleasure that I recommend it to all those who are actively engaged in this exciting transformation. Dr. Ruchir Puri, IBM Fellow, IBM Watson CTO & Chief Architect, IBM T. J. Watson Research Center

This book discusses single-channel, device-to-device communication in the Internet of Things (IoT) at the signal encoding level and introduces a new family of encoding techniques that result in significant simplifications of the communication circuitry. These simplifications translate into lower power consumption, smaller form factors, and dynamic data rates that are tolerant to clock discrepancies between transmitter and receiver. Readers will be introduced to signal encoding that uses edge-coded signaling, based on the coding of binary data as counts of transmitted pulses. The authors fully explore the far-reaching implications of these novel signal-encoding techniques and illustrate how their usage can help minimize the need for complex circuitries for either clock and data recovery or duty-cycle correction. They also provide a detailed description of a complete ecosystem of hardware and firmware built around edge-code signaling. The ecosystem comprises an application-specific processor, automatic protocol configuration, power and data rate management, cryptographic primitives, and automatic failure recovery modes. The innovative IoT communication link and its associated ecosystem are fully in line with the standard IoT requirements on power, footprint, security, robustness, and reliability.

This book discusses single-channel, device-to-device communication in the Internet of Things (IoT) at the signal encoding level and introduces a new family of encoding techniques that result in significant simplifications of the communication circuitry. These simplifications translate into lower power consumption, smaller form factors, and dynamic data rates that are tolerant to clock discrepancies between transmitter and receiver. Readers will be introduced to signal encoding that uses edge-coded signaling, based on the coding of binary data as counts of transmitted pulses. The authors fully explore the far-reaching implications of these novel signal-encoding techniques and illustrate how their usage can help minimize the need for complex circuitries for either clock and data recovery or duty-cycle correction. They also provide a detailed description of a complete ecosystem of hardware and firmware built around edge-code signaling. The ecosystem comprises an application-specific processor, automatic protocol configuration, power and data rate management, cryptographic primitives, and automatic failure recovery modes. The innovative IoT communication link and its associated ecosystem are fully in line with the standard IoT requirements on power, footprint, security, robustness, and reliability.

This book contains extended and revised versions of the best papers presented at the 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, held in Abu Dhabi, United Arab Emirates, in August 2017. The 11 papers included in this book were carefully reviewed and selected from the 33 full papers presented at the conference. The papers cover a wide range of topics in VLSI technology and advanced research. They address the latest scientific and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) Design. On the occasion of the silver jubilee of the VLSI-SoC conference series the book also includes a special chapter that presents the history of the VLSI-SoC series of conferences and its relation with VLSI-SoC evolution since the early 80s up to the present.

This book documents some of the most recent advances on the physical layer of the Internet of Things (IoT), including sensors, circuits, and systems. The application area selected for illustrating these advances is that of autonomous, wearable systems for real-time medical diagnosis. The book is unique in that it adopts a holistic view of such systems and includes not only the sensor and processing subsystems, but also the power, communication, and security subsystems. Particular attention is paid to the integration of these IoT subsystems as well as the prototyping platforms needed for achieving such integration. Other unique features include the discussion of energy-harvesting subsystems to achieve full energy autonomy and the consideration of hardware security as a requirement for the integrity of the IoT physical layer. One unifying thread of the various designs considered in this book is that they have all been fabricated and tested in an advanced, low-power CMOS process, namely GLOBALFOUNDRIES 65nm CMOS LPe.

This book explains for readers how 3D chip stacks promise to increase the level of on-chip integration, and to design new heterogeneous semiconductor devices that combine chips of different integration technologies (incl. sensors) in a single package of the smallest possible size. The authors focus on heterogeneous 3D integration, addressing some of the most important challenges in this emerging technology, including contactless, optics-based, and carbon-nanotube-based 3D integration, as well as signal-integrity and thermal management issues in copper-based 3D integration. Coverage also includes the 3D heterogeneous integration of power sources, photonic devices, and non-volatile memories based on new materials systems.