This book provides a comprehensive overview of flow-based, microfluidic VLSI. The authors describe and solve in a comprehensive and holistic manner practical challenges such as control synthesis, wash optimization, design for testability, and diagnosis of modern flow-based microfluidic biochips. They introduce practical solutions, based on rigorous optimization and formal models. The technical contributions presented in this book will not only shorten the product development cycle, but also accelerate the adoption and further development of modern flow-based microfluidic biochips, by facilitating the full exploitation of design complexities that are possible with current fabrication techniques.

At 90 nm, wires account for nearly 75% of the total delay in a circuit. Even more insidious, however, is that among nearly 40% of these nets, more than 50% of their total net capacitance are attributed to the cross-coupling capacitance between neighboring signals. At this point a new design and optimization paradigm based on real wires is required. Nanometer routers must prevent and correct these effects on-the-fly in order to reach timing closure.

This book describes a comprehensive framework for hardware/software co-design, optimization, and use of robust, low-cost, and cyberphysical digital microfluidic systems. Readers with a background in electronic design automation will find this book to be a valuable reference for leveraging conventional VLSI CAD techniques for emerging technologies, e.g., biochips or bioMEMS. Readers from the circuit/system design community will benefit from methods presented to extend design and testing techniques from microelectronics to mixed-technology microsystems. For readers from the microfluidics domain, this book presents a new design and development strategy for cyberphysical microfluidics-based biochips suitable for large-scale bioassay applications. * Takes a transformative, "cyberphysical" approach towards achieving closed-loop and sensor feedback-driven biochip operation under program control; * Presents a "physically-aware" system reconfiguration technique that uses sensor data at intermediate checkpoints to dynamically reconfigure biochips; * Enables readers to simplify the structure of biochips, while facilitating the "general-purpose" use of digital microfluidic biochips for a wider range of applications.

This book provides an insightful guide to the design, testing and optimization of micro-electrode-dot-array (MEDA) digital microfluidic biochips. The authors focus on the characteristics specific for MEDA biochips, e.g., real-time sensing and advanced microfluidic operations like lamination mixing and droplet shape morphing. Readers will be enabled to enhance the automated design and use of MEDA and to develop a set of solutions to facilitate the full exploitation of design complexities that are possible with standard CMOS fabrication techniques. The book provides the first set of design automation and test techniques for MEDA biochips. The methods described in this book have been validated using fabricated MEDA biochips in the laboratory. Readers will benefit from an in-depth look at the MEDA platform and how to combine microfluidics with software, e.g., applying biomolecular protocols to software-controlled and cyberphysical microfluidic biochips.

This book provides a comprehensive overview of flow-based, microfluidic VLSI. The authors describe and solve in a comprehensive and holistic manner practical challenges such as control synthesis, wash optimization, design for testability, and diagnosis of modern flow-based microfluidic biochips. They introduce practical solutions, based on rigorous optimization and formal models. The technical contributions presented in this book will not only shorten the product development cycle, but also accelerate the adoption and further development of modern flow-based microfluidic biochips, by facilitating the full exploitation of design complexities that are possible with current fabrication techniques.

At 90 nm, wires account for nearly 75% of the total delay in a circuit. Even more insidious, however, is that among nearly 40% of these nets, more than 50% of their total net capacitance are attributed to the cross-coupling capacitance between neighboring signals. At this point a new design and optimization paradigm based on real wires is required. Nanometer routers must prevent and correct these effects on-the-fly in order to reach timing closure. From a manufacturability standpoint, nanometer routers must explicitly deal with the ever increasing design complexity, and be capable of adapting to the constraint requirements of timing, signal integrity, process antenna effect, and new interconnect architecture such as X-architecture.

In the nanometer era, we must look into new-generation routing technologies that combine high performance and capacity with the integration of congestion, timing, SI prevention, and DFM algorithms as the best means of getting to design closure quickly. In this book, we present a novel multilevel full-chip router, namely mSIGMA for SIGnal-integrity and MAnufacturability optimization. And these routing technologies will ensure faster time-to-market and time-to-profitability.