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Design for AT-Speed Test, Diagnosis and Measurement (Hardcover, 2000 ed.) Loot Price: R4,551
Discovery Miles 45 510
Design for AT-Speed Test, Diagnosis and Measurement (Hardcover, 2000 ed.): Benoit Nadeau-Dostie

Design for AT-Speed Test, Diagnosis and Measurement (Hardcover, 2000 ed.)

Benoit Nadeau-Dostie

Series: Frontiers in Electronic Testing, 15

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Loot Price R4,551 Discovery Miles 45 510 | Repayment Terms: R426 pm x 12*

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Design for AT-Speed Test, Diagnosis and Measurement is the first book to offer practical and proven design-for-testability (DFT) solutions to chip and system design engineers, test engineers and product managers at the silicon level as well as at the board and systems levels. Designers will see how the implementation of embedded test enables simplification of silicon debug and system bring-up. Test engineers will determine how embedded test provides a superior level of at-speed test, diagnosis and measurement without exceeding the capabilities of their equipment. Product managers will learn how the time, resources and costs associated with test development, manufacture cost and lifecycle maintenance of their products can be significantly reduced by designing embedded test in the product. A complete design flow and analysis of the impact of embedded test on a design makes this book a must read' before any DFT is attempted.

General

Imprint: Springer
Country of origin: Netherlands
Series: Frontiers in Electronic Testing, 15
Release date: September 1999
First published: 2000
Editors: Benoit Nadeau-Dostie
Dimensions: 254 x 178 x 15mm (L x W x T)
Format: Hardcover
Pages: 239
Edition: 2000 ed.
ISBN-13: 978-0-7923-8669-8
Categories: Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Electronic devices & materials > General
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LSN: 0-7923-8669-8
Barcode: 9780792386698

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